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authorKulin Seth <kulinseth@gmail.com>2022-07-25 21:53:21 +0300
committerGitHub <noreply@github.com>2022-07-25 21:53:21 +0300
commit503937b094c01144945f2fc50f9ea4cc81e6bc60 (patch)
tree1d47f1bd6b54652b70f3b919aaf8ec7e84a2dd5e
parent5e63739504f0f8e18e941bd63b2d6d42536c7d90 (diff)
Use sysctls available in macOS 12 / iOS 15 for hardware feature support. (#100)
* Use sysctls available in macOS 12 / iOS 15 for hardware feature support. Co-authored-by: Developer-Ecosystem-Engineering <65677710+Developer-Ecosystem-Engineering@users.noreply.github.com>
-rw-r--r--src/arm/mach/init.c80
1 files changed, 56 insertions, 24 deletions
diff --git a/src/arm/mach/init.c b/src/arm/mach/init.c
index 1f4780a..3ced773 100644
--- a/src/arm/mach/init.c
+++ b/src/arm/mach/init.c
@@ -336,34 +336,66 @@ void cpuinfo_arm_mach_init(void) {
break;
#endif
}
+
/*
- * Support for ARMv8.1 Atomics & FP16 arithmetic instructions is supposed to be detected via
- * sysctlbyname calls with "hw.optional.armv8_1_atomics" and "hw.optional.neon_fp16" arguments
- * (see https://devstreaming-cdn.apple.com/videos/wwdc/2018/409t8zw7rumablsh/409/409_whats_new_in_llvm.pdf),
- * but on new iOS versions these calls just fail with EPERM.
- *
- * Thus, we whitelist CPUs known to support these instructions.
+ * iOS 15 and macOS 12 added sysctls for ARM features. Use them where
+ * possible. Otherwise, fallback to hardcoded set of CPUs with known
+ * support.
*/
- switch (cpu_family) {
- case CPUFAMILY_ARM_MONSOON_MISTRAL:
- case CPUFAMILY_ARM_VORTEX_TEMPEST:
- case CPUFAMILY_ARM_LIGHTNING_THUNDER:
- case CPUFAMILY_ARM_FIRESTORM_ICESTORM:
- #if CPUINFO_ARCH_ARM64
- cpuinfo_isa.atomics = true;
- #endif
- cpuinfo_isa.fp16arith = true;
+
+ const uint32_t has_feat_lse = get_sys_info_by_name("hw.optional.arm.FEAT_LSE");
+ if (has_feat_lse != 0) {
+ cpuinfo_isa.atomics = true;
}
+ #if CPUINFO_ARCH_ARM64
+ else {
+ switch (cpu_family) {
+ case CPUFAMILY_ARM_MONSOON_MISTRAL:
+ case CPUFAMILY_ARM_VORTEX_TEMPEST:
+ case CPUFAMILY_ARM_LIGHTNING_THUNDER:
+ case CPUFAMILY_ARM_FIRESTORM_ICESTORM:
+ cpuinfo_isa.atomics = true;
+ }
+ }
+ #endif
- /*
- * There does not yet seem to exist an OS mechanism to detect support for
- * ARMv8.2 optional dot-product instructions, so we currently whitelist CPUs
- * known to support these instruction.
- */
- switch (cpu_family) {
- case CPUFAMILY_ARM_LIGHTNING_THUNDER:
- case CPUFAMILY_ARM_FIRESTORM_ICESTORM:
- cpuinfo_isa.dot = true;
+ const uint32_t has_feat_rdm = get_sys_info_by_name("hw.optional.arm.FEAT_RDM");
+ if (has_feat_rdm != 0) {
+ cpuinfo_isa.rdm = true;
+ }
+
+ const uint32_t has_feat_fp16 = get_sys_info_by_name("hw.optional.arm.FEAT_FP16");
+ if (has_feat_fp16 != 0) {
+ cpuinfo_isa.fp16arith = true;
+ } else {
+ switch (cpu_family) {
+ case CPUFAMILY_ARM_MONSOON_MISTRAL:
+ case CPUFAMILY_ARM_VORTEX_TEMPEST:
+ case CPUFAMILY_ARM_LIGHTNING_THUNDER:
+ case CPUFAMILY_ARM_FIRESTORM_ICESTORM:
+ cpuinfo_isa.fp16arith = true;
+ }
+ }
+
+ const uint32_t has_feat_dotprod = get_sys_info_by_name("hw.optional.arm.FEAT_DotProd");
+ if (has_feat_dotprod != 0) {
+ cpuinfo_isa.dot = true;
+ } else {
+ switch (cpu_family) {
+ case CPUFAMILY_ARM_LIGHTNING_THUNDER:
+ case CPUFAMILY_ARM_FIRESTORM_ICESTORM:
+ cpuinfo_isa.dot = true;
+ }
+ }
+
+ const uint32_t has_feat_jscvt = get_sys_info_by_name("hw.optional.arm.FEAT_JSCVT");
+ if (has_feat_jscvt != 0) {
+ cpuinfo_isa.jscvt = true;
+ }
+
+ const uint32_t has_feat_fcma = get_sys_info_by_name("hw.optional.arm.FEAT_FCMA");
+ if (has_feat_fcma != 0) {
+ cpuinfo_isa.fcma = true;
}
const uint32_t has_FEAT_BF16 = get_sys_info_by_name("hw.optional.arm.FEAT_BF16");