Detect Cortex-A710/-A510/-X2 cores (#109)

5 files changed, 48 insertions, 23 deletions

diff --git a/include/cpuinfo.h b/include/cpuinfo.h
index e3d7b08..12e17e4 100644
--- a/include/cpuinfo.h
+++ b/include/cpuinfo.h
@@ -432,7 +432,14 @@ enum cpuinfo_uarch {
 	cpuinfo_uarch_neoverse_n2  = 0x00300403,
 
 	/** ARM Cortex-X1. */
-	cpuinfo_uarch_cortex_x1    = 0x00300500,
+	cpuinfo_uarch_cortex_x1    = 0x00300501,
+	/** ARM Cortex-X2. */
+	cpuinfo_uarch_cortex_x2    = 0x00300502,
+
+	/** ARM Cortex-A510. */
+	cpuinfo_uarch_cortex_a510  = 0x00300551,
+	/** ARM Cortex-A710. */
+	cpuinfo_uarch_cortex_a710  = 0x00300571,
 
 	/** Qualcomm Scorpion. */
 	cpuinfo_uarch_scorpion = 0x00400100,
diff --git a/src/arm/linux/aarch32-isa.c b/src/arm/linux/aarch32-isa.c
index d6f6a21..fb95ee9 100644
--- a/src/arm/linux/aarch32-isa.c
+++ b/src/arm/linux/aarch32-isa.c
@@ -75,11 +75,11 @@ void cpuinfo_arm_linux_decode_isa_from_proc_cpuinfo(
 				case UINT32_C(0x4100D050): /* Cortex-A55 */
 				case UINT32_C(0x4100D060): /* Cortex-A65 */
 				case UINT32_C(0x4100D0B0): /* Cortex-A76 */
-				case UINT32_C(0x4100D0C0): /* Neoverse N1 */
 				case UINT32_C(0x4100D0D0): /* Cortex-A77 */
 				case UINT32_C(0x4100D0E0): /* Cortex-A76AE */
-				case UINT32_C(0x4100D400): /* Neoverse V1 */
-				case UINT32_C(0x4100D490): /* Neoverse N2 */
+				case UINT32_C(0x4100D460): /* Cortex-A510 */
+				case UINT32_C(0x4100D470): /* Cortex-A710 */
+				case UINT32_C(0x4100D480): /* Cortex-X2 */
 				case UINT32_C(0x4800D400): /* Cortex-A76 (HiSilicon) */
 				case UINT32_C(0x51008020): /* Kryo 385 Gold (Cortex-A75) */
 				case UINT32_C(0x51008030): /* Kryo 385 Silver (Cortex-A55) */
@@ -102,6 +102,9 @@ void cpuinfo_arm_linux_decode_isa_from_proc_cpuinfo(
 			case UINT32_C(0x4100D0D0): /* Cortex-A77 */
 			case UINT32_C(0x4100D0E0): /* Cortex-A76AE */
 			case UINT32_C(0x4800D400): /* Cortex-A76 (HiSilicon) */
+			case UINT32_C(0x4100D460): /* Cortex-A510 */
+			case UINT32_C(0x4100D470): /* Cortex-A710 */
+			case UINT32_C(0x4100D480): /* Cortex-X2 */
 			case UINT32_C(0x51008040): /* Kryo 485 Gold (Cortex-A76) */
 			case UINT32_C(0x51008050): /* Kryo 485 Silver (Cortex-A55) */
 			case UINT32_C(0x53000030): /* Exynos-M4 */
diff --git a/src/arm/midr.h b/src/arm/midr.h
index 6329783..b0e244c 100644
--- a/src/arm/midr.h
+++ b/src/arm/midr.h
@@ -174,26 +174,25 @@ inline static uint32_t midr_score_core(uint32_t midr) {
 		case UINT32_C(0x53000030): /* Exynos M4 */
 		case UINT32_C(0x53000040): /* Exynos M5 */
 		case UINT32_C(0x4100D440): /* Cortex-X1 */
-			/* These cores are in big role w.r.t Cortex-A75/-A76/-A77/-A78 */
+		case UINT32_C(0x4100D480): /* Cortex-X2 */
+			/* These cores are in big role w.r.t Cortex-A75/-A76/-A77/-A78/-A710 */
 			return 6;
+		case UINT32_C(0x4100D080): /* Cortex-A72 */
+		case UINT32_C(0x4100D090): /* Cortex-A73 */
+		case UINT32_C(0x4100D0A0): /* Cortex-A75 */
+		case UINT32_C(0x4100D0B0): /* Cortex-A76 */
+		case UINT32_C(0x4100D0D0): /* Cortex-A77 */
+		case UINT32_C(0x4100D0E0): /* Cortex-A76AE */
+		case UINT32_C(0x4100D410): /* Cortex-A78 */
+		case UINT32_C(0x4100D470): /* Cortex-A710 */
+		case UINT32_C(0x4800D400): /* Cortex-A76 (HiSilicon) */
 		case UINT32_C(0x4E000030): /* Denver 2 */
+		case UINT32_C(0x51002050): /* Kryo Gold */
+		case UINT32_C(0x51008000): /* Kryo 260 / 280 Gold */
+		case UINT32_C(0x51008020): /* Kryo 385 Gold */
+		case UINT32_C(0x51008040): /* Kryo 485 Gold / Gold Prime */
 		case UINT32_C(0x53000010): /* Exynos M1 and Exynos M2 */
 		case UINT32_C(0x53000020): /* Exynos M3 */
-		case UINT32_C(0x51008040): /* Kryo 485 Gold / Gold Prime */
-		case UINT32_C(0x51008020): /* Kryo 385 Gold */
-		case UINT32_C(0x51008000): /* Kryo 260 / 280 Gold */
-		case UINT32_C(0x51002050): /* Kryo Gold */
-		case UINT32_C(0x4800D400): /* Cortex-A76 (HiSilicon) */
-		case UINT32_C(0x4100D490): /* Neoverse N2 */
-		case UINT32_C(0x4100D410): /* Cortex-A78 */
-		case UINT32_C(0x4100D400): /* Neoverse V1 */
-		case UINT32_C(0x4100D0D0): /* Cortex-A77 */
-		case UINT32_C(0x4100D0E0): /* Cortex-A76AE */
-		case UINT32_C(0x4100D0C0): /* Neoverse-N1 */
-		case UINT32_C(0x4100D0B0): /* Cortex-A76 */
-		case UINT32_C(0x4100D0A0): /* Cortex-A75 */
-		case UINT32_C(0x4100D090): /* Cortex-A73 */
-		case UINT32_C(0x4100D080): /* Cortex-A72 */
 #if CPUINFO_ARCH_ARM
 		case UINT32_C(0x4100C0F0): /* Cortex-A15 */
 		case UINT32_C(0x4100C0E0): /* Cortex-A17 */
@@ -208,8 +207,9 @@ inline static uint32_t midr_score_core(uint32_t midr) {
 #if CPUINFO_ARCH_ARM64
 		case UINT32_C(0x4100D060): /* Cortex-A65 */
 #endif /* CPUINFO_ARCH_ARM64 */
-		case UINT32_C(0x4100D050): /* Cortex-A55 */
 		case UINT32_C(0x4100D030): /* Cortex-A53 */
+		case UINT32_C(0x4100D050): /* Cortex-A55 */
+		case UINT32_C(0x4100D460): /* Cortex-A510 */
 			/* Cortex-A53 is usually in LITTLE role, but can be in big role w.r.t. Cortex-A35 */
 			return 2;
 		case UINT32_C(0x4100D040): /* Cortex-A35 */
diff --git a/src/arm/uarch.c b/src/arm/uarch.c
index 346e1c1..1d4c6ee 100644
--- a/src/arm/uarch.c
+++ b/src/arm/uarch.c
@@ -102,6 +102,15 @@ void cpuinfo_arm_decode_vendor_uarch(
 				case 0xD44: /* Cortex-X1 */
 					*uarch = cpuinfo_uarch_cortex_x1;
 					break;
+				case 0xD46: /* Cortex-A510 */
+					*uarch = cpuinfo_uarch_cortex_a510;
+					break;
+				case 0xD47: /* Cortex-A710 */
+					*uarch = cpuinfo_uarch_cortex_a710;
+					break;
+				case 0xD48: /* Cortex-X2 */
+					*uarch = cpuinfo_uarch_cortex_x2;
+					break;
 #if CPUINFO_ARCH_ARM64 && !defined(__ANDROID__)
 				case 0xD49:
 					*uarch = cpuinfo_uarch_neoverse_n2;
diff --git a/tools/cpu-info.c b/tools/cpu-info.c
index ff80405..2cd9598 100644
--- a/tools/cpu-info.c
+++ b/tools/cpu-info.c
@@ -187,14 +187,20 @@ static const char* uarch_to_string(enum cpuinfo_uarch uarch) {
 			return "Cortex-A77";
 		case cpuinfo_uarch_cortex_a78:
 			return "Cortex-A78";
+		case cpuinfo_uarch_cortex_a510:
+			return "Cortex-A510";
+		case cpuinfo_uarch_cortex_a710:
+			return "Cortex-A710";
+		case cpuinfo_uarch_cortex_x1:
+			return "Cortex-X1";
+		case cpuinfo_uarch_cortex_x2:
+			return "Cortex-X2";
 		case cpuinfo_uarch_neoverse_n1:
 			return "Neoverse-N1";
 		case cpuinfo_uarch_neoverse_v1:
 			return "Neoverse-V1";
 		case cpuinfo_uarch_neoverse_n2:
 			return "Neoverse-N2";
-		case cpuinfo_uarch_cortex_x1:
-			return "Cortex-X1";
 		case cpuinfo_uarch_scorpion:
 			return "Scorpion";
 		case cpuinfo_uarch_krait: