diff options
| author | Guillaume Revaillot <revaillot@archos.com> | 2019-08-28 19:04:02 +0300 |
|---|---|---|
| committer | Karl Palsson <karlp@tweak.net.au> | 2019-08-28 23:54:35 +0300 |
| commit | 8a1cfa8cebfb6e7de3e50fee47d8e5be948670cc (patch) | |
| tree | de61e59dc8dea179514f7817858ff6374d6eb05e | |
| parent | 998e647dde22318a33acc14d1fc39692a7779b92 (diff) | |
stm32g0: use proper register for gpio peripheral clock sleep enable.
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
| -rw-r--r-- | include/libopencm3/stm32/g0/rcc.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/include/libopencm3/stm32/g0/rcc.h b/include/libopencm3/stm32/g0/rcc.h index bf6ec4d1..dd989cef 100644 --- a/include/libopencm3/stm32/g0/rcc.h +++ b/include/libopencm3/stm32/g0/rcc.h @@ -678,12 +678,12 @@ enum rcc_periph_clken { RCC_TIM1 = _REG_BIT(RCC_APBENR2_OFFSET, 11), RCC_SYSCFG = _REG_BIT(RCC_APBENR2_OFFSET, 0), - SCC_GPIOF = _REG_BIT(RCC_IOPENR_OFFSET, 5), - SCC_GPIOE = _REG_BIT(RCC_IOPENR_OFFSET, 4), - SCC_GPIOD = _REG_BIT(RCC_IOPENR_OFFSET, 3), - SCC_GPIOC = _REG_BIT(RCC_IOPENR_OFFSET, 2), - SCC_GPIOB = _REG_BIT(RCC_IOPENR_OFFSET, 1), - SCC_GPIOA = _REG_BIT(RCC_IOPENR_OFFSET, 0), + SCC_GPIOF = _REG_BIT(RCC_IOPSMENR_OFFSET, 5), + SCC_GPIOE = _REG_BIT(RCC_IOPSMENR_OFFSET, 4), + SCC_GPIOD = _REG_BIT(RCC_IOPSMENR_OFFSET, 3), + SCC_GPIOC = _REG_BIT(RCC_IOPSMENR_OFFSET, 2), + SCC_GPIOB = _REG_BIT(RCC_IOPSMENR_OFFSET, 1), + SCC_GPIOA = _REG_BIT(RCC_IOPSMENR_OFFSET, 0), SCC_RNG = _REG_BIT(RCC_AHBSMENR_OFFSET, 18), SCC_AES = _REG_BIT(RCC_AHBSMENR_OFFSET, 16), |