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| author | Karl Palsson <karlp@tweak.net.au> | 2018-08-22 00:18:25 +0300 |
|---|---|---|
| committer | Karl Palsson <karlp@tweak.net.au> | 2018-08-22 00:20:51 +0300 |
| commit | cfe514913f0ee642c47f5ca2423d16a475dfd83f (patch) | |
| tree | 55cf7e05437a914aedecd8661ffbc88b964dedfd | |
| parent | 6fa75afbc66f5f612db212c77d66b3dfa3314ff8 (diff) | |
cm3: scs: drop (superseded) dwt macros
They are all superseded by dwt.h, and the function dwt_enable_cycle_counter
Fixes https://github.com/libopencm3/libopencm3/issues/125
(But only for the cycle count enabling)
| -rw-r--r-- | include/libopencm3/cm3/scs.h | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/include/libopencm3/cm3/scs.h b/include/libopencm3/cm3/scs.h index b4801549..02618efd 100644 --- a/include/libopencm3/cm3/scs.h +++ b/include/libopencm3/cm3/scs.h @@ -328,12 +328,6 @@ /* CoreSight Lock Access key, common for all */ #define SCS_LAR_KEY 0xC5ACCE55 -/* TODO bit definition values for other DWT_XXX register */ - -/* Macro to be called at startup to enable SCS & Cycle Counter */ -#define SCS_DWT_CYCLE_COUNTER_ENABLED() ((SCS_DEMCR |= SCS_DEMCR_TRCENA)\ - (SCS_DWT_CTRL |= SCS_DWT_CTRL_CYCCNTENA)) - #define SCS_SYSTICK_DISABLED() (SCS_SYST_CSR = 0) /* Macro to be called at startup to Enable CortexMx SysTick (but IRQ not |