diff options
| author | Guillaume Revaillot <revaillot@archos.com> | 2019-08-27 17:23:54 +0300 |
|---|---|---|
| committer | Guillaume Revaillot <revaillot@archos.com> | 2019-08-27 17:24:42 +0300 |
| commit | ec597796d7cbbea5cc133fae93bef6e7d41854ad (patch) | |
| tree | 49912b09735982f96e9dbb4459fb1198d39c1679 | |
| parent | 7ff54cb7f075b0bf46a340d5f71b6d8cf9936f3c (diff) | |
stm32g0: fix bad typos in memorymap, impacting tim1 and tim15-17.
| -rw-r--r-- | include/libopencm3/stm32/g0/memorymap.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/include/libopencm3/stm32/g0/memorymap.h b/include/libopencm3/stm32/g0/memorymap.h index 958e869d..7e85ceca 100644 --- a/include/libopencm3/stm32/g0/memorymap.h +++ b/include/libopencm3/stm32/g0/memorymap.h @@ -58,12 +58,12 @@ #define SYSCFG_ITLINE_BASE (PERIPH_BASE_APB2 + 0x0080) #define COMP_BASE (PERIPH_BASE_APB2 + 0x0200) #define ADC1_BASE (PERIPH_BASE_APB2 + 0x2400) -#define TIM1_BASE (PERIPH_BASE_APB1 + 0x2C00) +#define TIM1_BASE (PERIPH_BASE_APB2 + 0x2C00) #define SPI1_BASE (PERIPH_BASE_APB2 + 0x3000) #define USART1_BASE (PERIPH_BASE_APB2 + 0x3800) -#define TIM15_BASE (PERIPH_BASE_APB1 + 0x4000) -#define TIM16_BASE (PERIPH_BASE_APB1 + 0x4400) -#define TIM17_BASE (PERIPH_BASE_APB1 + 0x4800) +#define TIM15_BASE (PERIPH_BASE_APB2 + 0x4000) +#define TIM16_BASE (PERIPH_BASE_APB2 + 0x4400) +#define TIM17_BASE (PERIPH_BASE_APB2 + 0x4800) #define DBGMCU_BASE (PERIPH_BASE_APB2 + 0x5800) /* AHB */ |