diff options
| author | Karl Palsson <karlp@remake.is> | 2014-12-17 20:23:45 +0300 |
|---|---|---|
| committer | Karl Palsson <karlp@remake.is> | 2014-12-17 20:26:25 +0300 |
| commit | c09d2583dd8c49590bb12be3810937bcdaf076c5 (patch) | |
| tree | 206098a58f98507a37961d1435028e30ca4287af /include/libopencm3/stm32/common/flash_common_f24.h | |
| parent | 14ad92015e0316e0773448c91f30a00c1d213c27 (diff) | |
stm32: f4: Add FLASH_OPTCR1 definition
This is required for stm32f42xx and stm32f43xx with second bank options.
Diffstat (limited to 'include/libopencm3/stm32/common/flash_common_f24.h')
| -rw-r--r-- | include/libopencm3/stm32/common/flash_common_f24.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/include/libopencm3/stm32/common/flash_common_f24.h b/include/libopencm3/stm32/common/flash_common_f24.h index b47329c7..f4495b8c 100644 --- a/include/libopencm3/stm32/common/flash_common_f24.h +++ b/include/libopencm3/stm32/common/flash_common_f24.h @@ -45,6 +45,7 @@ /* --- FLASH registers ----------------------------------------------------- */ #define FLASH_OPTCR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x14) +#define FLASH_OPTCR1 MMIO32(FLASH_MEM_INTERFACE_BASE + 0x18) /* --- FLASH_ACR values ---------------------------------------------------- */ @@ -104,6 +105,10 @@ #define FLASH_OPTCR_BOR_LEVEL_1 (0x02 << 2) #define FLASH_OPTCR_BOR_OFF (0x03 << 2) +/* --- FLASH_OPTCR1 values ------------------------------------------------- */ +/* Only on some devices */ +/* FLASH_OPTCR1[27:16]: nWRP bank 2 */ + /* --- FLASH Keys -----------------------------------------------------------*/ #define FLASH_OPTKEYR_KEY1 ((uint32_t)0x08192a3b) |