diff options
| author | Nicolas Schodet <nico@ni.fr.eu.org> | 2015-10-27 16:42:58 +0300 |
|---|---|---|
| committer | Nicolas Schodet <nico@ni.fr.eu.org> | 2015-11-10 16:27:57 +0300 |
| commit | 9b8d44e8a3cc52d83aba3b5547c2bb56cdbd8b63 (patch) | |
| tree | 34951f6ea822b6aa00b1be5bfa3d30de08bccb15 /include/libopencm3/stm32/common/gpio_common_f24.h | |
| parent | fd100ea6c202c317c7ddda3e8ff3415b60c7ad83 (diff) | |
stm32f4: add GPIOJ & GPIOK
They are available on STM32F429 and STM32F439.
Diffstat (limited to 'include/libopencm3/stm32/common/gpio_common_f24.h')
| -rw-r--r-- | include/libopencm3/stm32/common/gpio_common_f24.h | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/include/libopencm3/stm32/common/gpio_common_f24.h b/include/libopencm3/stm32/common/gpio_common_f24.h index 69e18c70..99758d0c 100644 --- a/include/libopencm3/stm32/common/gpio_common_f24.h +++ b/include/libopencm3/stm32/common/gpio_common_f24.h @@ -48,6 +48,8 @@ specific memorymap.h header before including this header file.*/ #define GPIOG GPIO_PORT_G_BASE #define GPIOH GPIO_PORT_H_BASE #define GPIOI GPIO_PORT_I_BASE +#define GPIOJ GPIO_PORT_J_BASE +#define GPIOK GPIO_PORT_K_BASE /**@}*/ /* --- GPIO registers for STM32F2, STM32F3 and STM32F4 --------------------- */ @@ -56,51 +58,71 @@ specific memorymap.h header before including this header file.*/ #define GPIOG_MODER GPIO_MODER(GPIOG) #define GPIOH_MODER GPIO_MODER(GPIOH) #define GPIOI_MODER GPIO_MODER(GPIOI) +#define GPIOJ_MODER GPIO_MODER(GPIOJ) +#define GPIOK_MODER GPIO_MODER(GPIOK) /* Port output type register (GPIOx_OTYPER) */ #define GPIOG_OTYPER GPIO_OTYPER(GPIOG) #define GPIOH_OTYPER GPIO_OTYPER(GPIOH) #define GPIOI_OTYPER GPIO_OTYPER(GPIOI) +#define GPIOJ_OTYPER GPIO_OTYPER(GPIOJ) +#define GPIOK_OTYPER GPIO_OTYPER(GPIOK) /* Port output speed register (GPIOx_OSPEEDR) */ #define GPIOG_OSPEEDR GPIO_OSPEEDR(GPIOG) #define GPIOH_OSPEEDR GPIO_OSPEEDR(GPIOH) #define GPIOI_OSPEEDR GPIO_OSPEEDR(GPIOI) +#define GPIOJ_OSPEEDR GPIO_OSPEEDR(GPIOJ) +#define GPIOK_OSPEEDR GPIO_OSPEEDR(GPIOK) /* Port pull-up/pull-down register (GPIOx_PUPDR) */ #define GPIOG_PUPDR GPIO_PUPDR(GPIOG) #define GPIOH_PUPDR GPIO_PUPDR(GPIOH) #define GPIOI_PUPDR GPIO_PUPDR(GPIOI) +#define GPIOJ_PUPDR GPIO_PUPDR(GPIOJ) +#define GPIOK_PUPDR GPIO_PUPDR(GPIOK) /* Port input data register (GPIOx_IDR) */ #define GPIOG_IDR GPIO_IDR(GPIOG) #define GPIOH_IDR GPIO_IDR(GPIOH) #define GPIOI_IDR GPIO_IDR(GPIOI) +#define GPIOJ_IDR GPIO_IDR(GPIOJ) +#define GPIOK_IDR GPIO_IDR(GPIOK) /* Port output data register (GPIOx_ODR) */ #define GPIOG_ODR GPIO_ODR(GPIOG) #define GPIOH_ODR GPIO_ODR(GPIOH) #define GPIOI_ODR GPIO_ODR(GPIOI) +#define GPIOJ_ODR GPIO_ODR(GPIOJ) +#define GPIOK_ODR GPIO_ODR(GPIOK) /* Port bit set/reset register (GPIOx_BSRR) */ #define GPIOG_BSRR GPIO_BSRR(GPIOG) #define GPIOH_BSRR GPIO_BSRR(GPIOH) #define GPIOI_BSRR GPIO_BSRR(GPIOI) +#define GPIOJ_BSRR GPIO_BSRR(GPIOJ) +#define GPIOK_BSRR GPIO_BSRR(GPIOK) /* Port configuration lock register (GPIOx_LCKR) */ #define GPIOG_LCKR GPIO_LCKR(GPIOG) #define GPIOH_LCKR GPIO_LCKR(GPIOH) #define GPIOI_LCKR GPIO_LCKR(GPIOI) +#define GPIOJ_LCKR GPIO_LCKR(GPIOJ) +#define GPIOK_LCKR GPIO_LCKR(GPIOK) /* Alternate function low register (GPIOx_AFRL) */ #define GPIOG_AFRL GPIO_AFRL(GPIOG) #define GPIOH_AFRL GPIO_AFRL(GPIOH) #define GPIOI_AFRL GPIO_AFRL(GPIOI) +#define GPIOJ_AFRL GPIO_AFRL(GPIOJ) +#define GPIOK_AFRL GPIO_AFRL(GPIOK) /* Alternate function high register (GPIOx_AFRH) */ #define GPIOG_AFRH GPIO_AFRH(GPIOG) #define GPIOH_AFRH GPIO_AFRH(GPIOH) #define GPIOI_AFRH GPIO_AFRH(GPIOI) +#define GPIOJ_AFRH GPIO_AFRH(GPIOJ) +#define GPIOK_AFRH GPIO_AFRH(GPIOK) /**@}*/ #endif |