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| author | Karl Palsson <karlp@tweak.net.au> | 2018-07-29 23:53:38 +0300 |
|---|---|---|
| committer | Karl Palsson <karlp@tweak.net.au> | 2018-08-17 03:15:01 +0300 |
| commit | 0e58ee2f657deb37ce5e1c2b5b297b82a794c3ce (patch) | |
| tree | 47e51ea2227654778c0c1e2a23237346da3d91d5 /include/libopencm3/stm32/common/i2c_common_v1.h | |
| parent | b8ede60d9d2c54a90b4065fdd9a2cca655495fba (diff) | |
stm32: support i2c3 properly
I2C3 is on many parts, but wasn't properly supported with the register
definitions. Declare them centrally, just depending on the memorymap
defining them. On some parts, the rcc bits were defined, but not the
base registers.
Fixes: https://github.com/libopencm3/libopencm3/issues/820
Diffstat (limited to 'include/libopencm3/stm32/common/i2c_common_v1.h')
| -rw-r--r-- | include/libopencm3/stm32/common/i2c_common_v1.h | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/include/libopencm3/stm32/common/i2c_common_v1.h b/include/libopencm3/stm32/common/i2c_common_v1.h index e4998c61..16c8982a 100644 --- a/include/libopencm3/stm32/common/i2c_common_v1.h +++ b/include/libopencm3/stm32/common/i2c_common_v1.h @@ -47,6 +47,9 @@ specific memorymap.h header before including this header file.*/ @{*/ #define I2C1 I2C1_BASE #define I2C2 I2C2_BASE +#ifdef I2C3_BASE +#define I2C3 I2C3_BASE +#endif /**@}*/ /* --- I2C registers ------------------------------------------------------- */ @@ -96,6 +99,19 @@ specific memorymap.h header before including this header file.*/ #define I2C1_TRISE I2C_TRISE(I2C1) #define I2C2_TRISE I2C_TRISE(I2C2) +/* Not all parts have i2c3 */ +#ifdef I2C3_BASE +#define I2C3_CR1 I2C_CR1(I2C3) +#define I2C3_CR2 I2C_CR2(I2C3) +#define I2C3_OAR1 I2C_OAR1(I2C3) +#define I2C3_OAR2 I2C_OAR2(I2C3) +#define I2C3_DR I2C_DR(I2C3) +#define I2C3_SR1 I2C_SR1(I2C3) +#define I2C3_SR2 I2C_SR2(I2C3) +#define I2C3_CCR I2C_CCR(I2C3) +#define I2C3_TRISE I2C_TRISE(I2C3) +#endif + /* --- I2Cx_CR1 values ----------------------------------------------------- */ /* SWRST: Software reset */ |