diff options
author | Karl Palsson <karlp@tweak.net.au> | 2018-07-25 01:30:07 +0300 |
---|---|---|
committer | Karl Palsson <karlp@tweak.net.au> | 2018-07-29 23:31:17 +0300 |
commit | 231f21296f55cd7dc7d8449169ea92fbb539da75 (patch) | |
tree | b9104aa203b2a4a136898000e963dfacc71eef30 /include/libopencm3/stm32/common | |
parent | 46d4103c1dddd00ee3e5ff9d38a5b42923fc7fc0 (diff) |
stm32: f247: flash: use common code.
This shows what is _actually_ different for f7. A couple of option
bits, and a renaming of bit 7 of the status register, from Program
Sequence Error to Erase Sequence Error.
We keep the separate implementation of wait_for_last_operation, to meet
the "suggestions" of the reference manual to insert a DSB instruction.
Keeping the renamed bit/functions also requires us to keep separate
implementations of the flag clearing functions
Diffstat (limited to 'include/libopencm3/stm32/common')
-rw-r--r-- | include/libopencm3/stm32/common/flash_common_f24.h | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/include/libopencm3/stm32/common/flash_common_f24.h b/include/libopencm3/stm32/common/flash_common_f24.h index d504345c..bc71eacf 100644 --- a/include/libopencm3/stm32/common/flash_common_f24.h +++ b/include/libopencm3/stm32/common/flash_common_f24.h @@ -82,7 +82,6 @@ /* --- FLASH_SR values ----------------------------------------------------- */ #define FLASH_SR_BSY (1 << 16) -#define FLASH_SR_PGSERR (1 << 7) #define FLASH_SR_PGPERR (1 << 6) #define FLASH_SR_PGAERR (1 << 5) #define FLASH_SR_WRPERR (1 << 4) @@ -118,7 +117,6 @@ /* FLASH_OBR[15:8]: RDP */ #define FLASH_OPTCR_NRST_STDBY (1 << 7) #define FLASH_OPTCR_NRST_STOP (1 << 6) -#define FLASH_OPTCR_WDG_SW (1 << 5) #define FLASH_OPTCR_OPTSTRT (1 << 1) #define FLASH_OPTCR_OPTLOCK (1 << 0) #define FLASH_OPTCR_BOR_LEVEL_3 (0x00 << 2) @@ -143,7 +141,6 @@ BEGIN_DECLS void flash_lock_option_bytes(void); -void flash_clear_pgserr_flag(void); void flash_clear_pgperr_flag(void); void flash_clear_wrperr_flag(void); void flash_clear_pgaerr_flag(void); |