diff options
| author | Oliver Meier <h2obrain@gmail.com> | 2019-05-12 03:32:14 +0300 |
|---|---|---|
| committer | Karl Palsson <karlp@tweak.net.au> | 2019-05-20 00:33:07 +0300 |
| commit | 82498bb49f7651b1c123aa719969f7c809735de1 (patch) | |
| tree | ec95131f8396cbaf1ff3df1861460be44a3747c0 /include/libopencm3/stm32/common | |
| parent | 92a23405516f0b626ba4de654f374a1a1d4389b5 (diff) | |
stm32f7: fixed typos in dsi header definitions
Diffstat (limited to 'include/libopencm3/stm32/common')
| -rw-r--r-- | include/libopencm3/stm32/common/dsi_common_f47.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/include/libopencm3/stm32/common/dsi_common_f47.h b/include/libopencm3/stm32/common/dsi_common_f47.h index 7ff28aa0..087223de 100644 --- a/include/libopencm3/stm32/common/dsi_common_f47.h +++ b/include/libopencm3/stm32/common/dsi_common_f47.h @@ -131,7 +131,7 @@ #define DSI_VMCR_PGE (1 << 16) #define DSI_VMCR_LPCE (1 << 15) #define DSI_VMCR_FBTAAE (1 << 14) -#define DSI_VMCR_LPHFE (1 << 13) +#define DSI_VMCR_LPHFPE (1 << 13) #define DSI_VMCR_LPHBPE (1 << 12) #define DSI_VMCR_LPVAE (1 << 11) #define DSI_VMCR_LPVFPE (1 << 10) @@ -319,8 +319,8 @@ * DSI Host Timeout Counter Configuration Register 4 */ #define DSI_TCCR4 MMIO32(DSI_BASE + 0x88U) -#define DSI_TCCR4_LSWR_TOCNT_SHIFT 0 -#define DSI_TCCR4_LSWR_TOCNT_MASK 0xffff +#define DSI_TCCR4_LPWR_TOCNT_SHIFT 0 +#define DSI_TCCR4_LPWR_TOCNT_MASK 0xffff /** * DSI Host Timeout Counter Configuration Register 5 @@ -674,7 +674,7 @@ #define DSI_WCR_DSIEN (1 << 3) #define DSI_WCR_LTDCEN (1 << 2) #define DSI_WCR_SHTDN (1 << 1) -#define DSI_SCR_COLM (1 << 0) +#define DSI_WCR_COLM (1 << 0) /** * DSI Wrapper Interrupt Enable Register @@ -770,7 +770,7 @@ #define DSI_WPCR2_THSPREP_MASK 0xff #define DSI_WPCR2_TCLKZERO_SHIFT 8 #define DSI_WPCR2_TCLKZERO_MASK 0xff -#define DSI_WPCR2_TCLKPREP_SHIF 0 +#define DSI_WPCR2_TCLKPREP_SHIFT 0 #define DSI_WPCR2_TCLKPREP_MASK 0xff /** |