diff options
| author | Alfred Klomp <alfred@ampyxpower.com> | 2018-11-06 14:24:44 +0300 |
|---|---|---|
| committer | Alfred Klomp <alfred@ampyxpower.com> | 2018-11-06 14:58:36 +0300 |
| commit | a9c0008290ae7026fd4bc5c662966c6d88e80697 (patch) | |
| tree | 820e5a2f0afd98210d11f05f4bf0190036af38cc /include/libopencm3/stm32/common | |
| parent | 53347c266bb86f99b74c5f028c4c0f0c24d66b83 (diff) | |
stm32f09: add register definitions for DMA2
Diffstat (limited to 'include/libopencm3/stm32/common')
| -rw-r--r-- | include/libopencm3/stm32/common/dma_common_l1f013.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/include/libopencm3/stm32/common/dma_common_l1f013.h b/include/libopencm3/stm32/common/dma_common_l1f013.h index 489c9def..ab67246c 100644 --- a/include/libopencm3/stm32/common/dma_common_l1f013.h +++ b/include/libopencm3/stm32/common/dma_common_l1f013.h @@ -138,6 +138,11 @@ specific memorymap.h header before including this header file.*/ #define DMA2_CMAR4 DMA2_CMAR(DMA_CHANNEL4) #define DMA2_CMAR5 DMA2_CMAR(DMA_CHANNEL5) +/* DMA channel selection register (DMAx_CSELR) */ +#define DMA_CSELR(dma_base) MMIO32((dma_base) + 0xA8) +#define DMA1_CSELR DMA_CSELR(DMA1) +#define DMA2_CSELR DMA_CSELR(DMA2) + /* --- DMA_ISR values ------------------------------------------------------ */ /* --- DMA Interrupt Flag offset values ------------------------------------- */ |