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authorKarl Palsson <karlp@etactica.com>2019-06-12 00:37:40 +0300
committerKarl Palsson <karlp@tweak.net.au>2019-06-13 02:06:22 +0300
commit502593ca6fa6d5744994682c4fdd6a019871dbf4 (patch)
tree579f71650148dc1c487c9983c702c249267fb1ca /include/libopencm3/stm32
parent867bd164eb70dfe838282933ea21ca6de786059f (diff)
doc: stm32: exti-v1: fix conditionals, add registers
Fixes some missing definitions. cond/endcond is hard to get right sometimes!
Diffstat (limited to 'include/libopencm3/stm32')
-rw-r--r--include/libopencm3/stm32/common/exti_common_v1.h11
1 files changed, 11 insertions, 0 deletions
diff --git a/include/libopencm3/stm32/common/exti_common_v1.h b/include/libopencm3/stm32/common/exti_common_v1.h
index d7e3140c..9b091edb 100644
--- a/include/libopencm3/stm32/common/exti_common_v1.h
+++ b/include/libopencm3/stm32/common/exti_common_v1.h
@@ -1,3 +1,4 @@
+/** @addtogroup exti_defines */
#pragma once
/*
@@ -25,12 +26,21 @@
/* --- EXTI registers ------------------------------------------------------ */
+/** @defgroup exti_registers EXTI Registers
+@{*/
+/** EXTI Interrupt Mask Registers */
#define EXTI_IMR MMIO32(EXTI_BASE + 0x00)
+/** EXTI Event Mask Register */
#define EXTI_EMR MMIO32(EXTI_BASE + 0x04)
+/** EXTI Rising Trigger Selection Register */
#define EXTI_RTSR MMIO32(EXTI_BASE + 0x08)
+/** EXTI Falling Triger Selection Register */
#define EXTI_FTSR MMIO32(EXTI_BASE + 0x0c)
+/** EXTI Software Interrupt Event Register */
#define EXTI_SWIER MMIO32(EXTI_BASE + 0x10)
+/** EXTI Pending Register */
#define EXTI_PR MMIO32(EXTI_BASE + 0x14)
+/**@}*/
BEGIN_DECLS
@@ -38,6 +48,7 @@ END_DECLS
/**@}*/
+/** @cond */
#else
#warning "exti_common_v1.h should not be included directly, only via exti.h"
#endif