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authorMatthew Lai <m@matthewlai.ca>2017-02-28 19:38:31 +0300
committerMatthew Lai <m@matthewlai.ca>2017-02-28 19:57:28 +0300
commit4a378a729a9f9b7f24e527e74dd38b5ae3b9bc69 (patch)
treeee706db4ff69ca9731e0afb68b11f1fe657d6112 /ld/devices.data
parent62b58555e29daff7c7206ed8be74fcdc57e598e1 (diff)
devices.data: stm32f7: added all STM32F7 chips (as Feb, 2017)
Diffstat (limited to 'ld/devices.data')
-rw-r--r--ld/devices.data18
1 files changed, 14 insertions, 4 deletions
diff --git a/ld/devices.data b/ld/devices.data
index c118ee14..cfc50d48 100644
--- a/ld/devices.data
+++ b/ld/devices.data
@@ -58,7 +58,7 @@
# --- output of the awk script ---
# -DROM=16K -DRAM=4K -DROM_OFF=0x08000000 -DRAM_OFF=0x20000000
#
-# The generated linker script file will contain sections rom and ram with
+# The generated linker script file will contain sections rom and ram with
# appropriate initialization code, specified in linker file source linker.ld.S
#
@@ -131,8 +131,18 @@ stm32f4[23][79]?g* stm32f4ccm ROM=1024K RAM=192K CCM=64K
stm32f4[23][79]?i* stm32f4ccm ROM=2048K RAM=192K CCM=64K
# on F7 CCM is in some datasheets named as DTCM
-stm32f756?e* stm32f7ccm ROM=512K RAM=256K CCM=64K
-stm32f756?g* stm32f7ccm ROM=1024K RAM=256K CCM=64K
+stm32f7[23][23]?c* stm32f7ccm ROM=256K RAM=192K CCM=64K
+stm32f7[23][23]?e* stm32f7ccm ROM=512K RAM=192K CCM=64K
+stm32f745?e* stm32f7ccm ROM=512K RAM=256K CCM=64K
+stm32f745?g* stm32f7ccm ROM=1024K RAM=256K CCM=64K
+stm32f765?g* stm32f7ccm ROM=512K RAM=384K CCM=128K
+stm32f765?i* stm32f7ccm ROM=2048K RAM=384K CCM=128K
+stm32f7[45]6?e* stm32f7ccm ROM=512K RAM=256K CCM=64K
+stm32f7[45]6?g* stm32f7ccm ROM=1024K RAM=256K CCM=64K
+stm32f7[67]7?g* stm32f7ccm ROM=1024K RAM=384K CCM=128K
+stm32f7[67]7?i* stm32f7ccm ROM=2048K RAM=384K CCM=128K
+stm32f769?g* stm32f7ccm ROM=1024K RAM=384K CCM=128K
+stm32f7[67][89]?i* stm32f7ccm ROM=2048K RAM=384K CCM=128K
stm32l01??3* stm32l0 ROM=8K RAM=2K
stm32l0[12]??4* stm32l0 ROM=16K RAM=2K
@@ -404,7 +414,7 @@ stm32f1 END ROM_OFF=0x08000000 RAM_OFF=0x20000000 CPU=cortex-m3 FPU=soft
stm32f2 END ROM_OFF=0x08000000 RAM_OFF=0x20000000 CPU=cortex-m3 FPU=soft
stm32f3 END ROM_OFF=0x08000000 RAM_OFF=0x20000000 CPU=cortex-m4 FPU=hard-fpv4-sp-d16
stm32f4 END ROM_OFF=0x08000000 RAM_OFF=0x20000000 CPU=cortex-m4 FPU=hard-fpv4-sp-d16
-#stm32f7 is supported on GCC-arm-embedded 4.8 2014q4
+#stm32f7 is supported on GCC-arm-embedded 4.8 2014q4
stm32f7 END ROM_OFF=0x08000000 RAM_OFF=0x20010000 CPU=cortex-m7 FPU=hard-fpv5-sp-d16
stm32l0 END ROM_OFF=0x08000000 RAM_OFF=0x20000000 CPU=cortex-m0plus FPU=soft
stm32l1 END ROM_OFF=0x08000000 RAM_OFF=0x20000000 CPU=cortex-m3 FPU=soft