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authorJochen Hoenicke <hoenicke@gmail.com>2016-07-14 13:34:28 +0300
committerKarl Palsson <karlp@tweak.net.au>2017-03-31 00:48:07 +0300
commit8b99b56c59749482da340ba3e39500438798d698 (patch)
treeadc784c204d81de188ac1f2499e24028ee5d41e7 /lib/usb
parent0c1ff686add8f26797f9ab3d327b93a1bf88ba24 (diff)
stmfx07: usb: Clean up FIFO read/write macro usage.
Use REBASE(OTG_FIFO(endpoint)) to access the FIFO. For the receive FIFO do not use the endpoint. There is only one receive FIFO so giving the endpoint is a no-op. Get rid of REBASE_FIFO macro.
Diffstat (limited to 'lib/usb')
-rw-r--r--lib/usb/usb_control.c2
-rw-r--r--lib/usb/usb_fx07_common.c16
2 files changed, 10 insertions, 8 deletions
diff --git a/lib/usb/usb_control.c b/lib/usb/usb_control.c
index acaceb33..9d5884f3 100644
--- a/lib/usb/usb_control.c
+++ b/lib/usb/usb_control.c
@@ -262,7 +262,7 @@ void _usbd_control_out(usbd_device *usbd_dev, uint8_t ea)
*/
if (usb_control_request_dispatch(usbd_dev,
&(usbd_dev->control_state.req))) {
- /* Got to status stage on success. */
+ /* Go to status stage on success. */
usbd_ep_write_packet(usbd_dev, 0, NULL, 0);
usbd_dev->control_state.state = STATUS_IN;
} else {
diff --git a/lib/usb/usb_fx07_common.c b/lib/usb/usb_fx07_common.c
index 99c2a304..dae91409 100644
--- a/lib/usb/usb_fx07_common.c
+++ b/lib/usb/usb_fx07_common.c
@@ -31,7 +31,6 @@
* according to the selected cores base address. */
#define dev_base_address (usbd_dev->driver->base_address)
#define REBASE(x) MMIO32((x) + (dev_base_address))
-#define REBASE_FIFO(x) (&MMIO32((dev_base_address) + (OTG_FIFO(x))))
void stm32fx07_set_address(usbd_device *usbd_dev, uint8_t addr)
{
@@ -210,11 +209,10 @@ uint16_t stm32fx07_ep_write_packet(usbd_device *usbd_dev, uint8_t addr,
REBASE(OTG_DIEPTSIZ(addr)) = OTG_DIEPSIZ0_PKTCNT | len;
REBASE(OTG_DIEPCTL(addr)) |= OTG_DIEPCTL0_EPENA |
OTG_DIEPCTL0_CNAK;
- volatile uint32_t *fifo = REBASE_FIFO(addr);
/* Copy buffer to endpoint FIFO, note - memcpy does not work */
for (i = len; i > 0; i -= 4) {
- *fifo++ = *buf32++;
+ REBASE(OTG_FIFO(addr)) = *buf32++;
}
return len;
@@ -227,16 +225,19 @@ uint16_t stm32fx07_ep_read_packet(usbd_device *usbd_dev, uint8_t addr,
uint32_t *buf32 = buf;
uint32_t extra;
+ /* We do not need to know the endpoint address since there is only one
+ * receive FIFO for all endpoints.
+ */
+ (void) addr;
len = MIN(len, usbd_dev->rxbcnt);
- volatile uint32_t *fifo = REBASE_FIFO(addr);
for (i = len; i >= 4; i -= 4) {
- *buf32++ = *fifo++;
+ *buf32++ = REBASE(OTG_FIFO(0));
usbd_dev->rxbcnt -= 4;
}
if (i) {
- extra = *fifo++;
+ extra = REBASE(OTG_FIFO(0));
/* we read 4 bytes from the fifo, so update rxbcnt */
if (usbd_dev->rxbcnt < 4) {
/* Be careful not to underflow (rxbcnt is unsigned) */
@@ -349,7 +350,8 @@ void stm32fx07_poll(usbd_device *usbd_dev)
/* Discard unread packet data. */
for (i = 0; i < usbd_dev->rxbcnt; i += 4) {
- (void)*REBASE_FIFO(ep);
+ /* There is only one receive FIFO, so use OTG_FIFO(0) */
+ (void)REBASE(OTG_FIFO(0));
}
usbd_dev->rxbcnt = 0;