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| author | Karl Palsson <karlp@tweak.net.au> | 2018-08-29 13:17:55 +0300 |
|---|---|---|
| committer | Karl Palsson <karlp@tweak.net.au> | 2018-08-29 13:17:55 +0300 |
| commit | e04f10e591e5d7386171c20dcc538475736211c7 (patch) | |
| tree | 4eeff671891d153f9ad5e7d295bdcde38a33ffa1 /tests | |
| parent | de538c4b8028342e47abce9c1209f5fb3b6951c1 (diff) | |
tests: gadget0: stm32f3: use library clock setups
F3 rcc configs were overhauled and we can now use standard init code
instead of specifying our own custom clock config.
Diffstat (limited to 'tests')
| -rw-r--r-- | tests/gadget-zero/main-stm32f3-disco.c | 18 |
1 files changed, 1 insertions, 17 deletions
diff --git a/tests/gadget-zero/main-stm32f3-disco.c b/tests/gadget-zero/main-stm32f3-disco.c index de5bfccf..4c8d3d09 100644 --- a/tests/gadget-zero/main-stm32f3-disco.c +++ b/tests/gadget-zero/main-stm32f3-disco.c @@ -39,28 +39,12 @@ do { } while (0) #endif -const struct rcc_clock_scale this_clock_config = { - /* 72MHZ from 8MHZ external clock from stlink MCO */ - .pllsrc = RCC_CFGR_PLLSRC_HSE_PREDIV, - .pllmul = RCC_CFGR_PLLMUL_MUL9, - .plldiv = RCC_CFGR2_PREDIV_NODIV, - .usbdiv1 = false, - .flash_waitstates = 2, - .hpre = RCC_CFGR_HPRE_DIV_NONE, - .ppre1 = RCC_CFGR_PPRE1_DIV_2, - .ppre2 = RCC_CFGR_PPRE2_DIV_NONE, - .ahb_frequency = 72e6, - .apb1_frequency = 32e6, - .apb2_frequency = 72e6, -}; - - int main(void) { rcc_periph_clock_enable(RCC_GPIOE); gpio_mode_setup(GPIOE, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, GPIO11|GPIO12); gpio_set(GPIOE, GPIO12); - rcc_clock_setup_pll(&this_clock_config); + rcc_clock_setup_pll(&rcc_hse8mhz_configs[RCC_CLOCK_HSE8_72MHZ]); rcc_periph_clock_enable(RCC_GPIOA); /* |