Welcome to mirror list, hosted at ThFree Co, Russian Federation.

github.com/thirdpin/libopencm3.git - Unnamed repository; edit this file 'description' to name the repository.
summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2019-07-05stm32: extract l0 lptimer stuff from timer.h to common lptimer.hGuillaume Revaillot
lptimer peripheral is present on f4,f7,l0,l4,g0,g4 and prob others. Extract content from stm32l0 timer.h and make it usable by other chips.
2019-06-17stm32l0: dma: include dma_cselr, present on l0x1-2-3.Guillaume Revaillot
2019-06-16doc: stm32l0: fix doxygen groupings.Karl Palsson
Makes some @ingroup directives redundant.
2019-06-16stm32: l0: timer/lptimer: doc+Guillaume Revaillot
better doc for l0 lptimer registers, add mask.
2019-06-13doc: stm32l0: rcc: add groups requested by existing docsKarl Palsson
And cleanse the arguments to all match the docs.
2019-06-13doc: stm32l0: rcc: add groups and tags for bus prescalersKarl Palsson
2019-06-13doc:stm32: usart: fix grouping and heirarchy of base addrsKarl Palsson
They were always landing on the top level, or not even present.
2019-06-13doc: stm32l0: rcc: add groupings for periph resetsKarl Palsson
2019-06-10doc: restore targets as pages.Karl Palsson
You can't have two mainpage items, and the second was just being ignored. This restores them, which makes the left side list longer, which we may or may not like, but it's at least how it was documented to be.
2019-06-04stm32l0: rcc: add rcc_set_peripheral_clk_sel(periph, sel)Guillaume Revaillot
2019-06-04stm32l0: rcc: add peripherals clock source selection helpers.Guillaume Revaillot
2019-06-04stm32l0: add rcc_set_msi_range.Guillaume Revaillot
2019-05-21stm32: standardize OSPEED valuesKarl Palsson
Make the names match the reference manuals properly, and add missing names. Still a long way to go to unify across all families, but this is at least closer.
2019-01-31stm32: exti: define AFIO/SYSCFG_EXTICR_FIELDSIZE for all chip.Guillaume Revaillot
While on all current chips, exticr gpio port mux selection is coded on 4 bits, stm32g0 EXTI_EXTICR register uses 8 bits. Align all exti header to reference that value (was previously defined for f0 as SYCFG_EXTICR_SKIP)
2019-01-18stm32: exti: move register definition of all current stm32 devices to common_v1Guillaume Revaillot
Preparation for stm32g0 support, as this chip's exti register map evolved and is no longer common ...
2018-08-17stm32: support i2c3 properlyKarl Palsson
I2C3 is on many parts, but wasn't properly supported with the register definitions. Declare them centrally, just depending on the memorymap defining them. On some parts, the rcc bits were defined, but not the base registers. Fixes: https://github.com/libopencm3/libopencm3/issues/820
2018-07-29stm32: flash: pull up prefetch to _allKarl Palsson
Turns out, there's lots of common code for flash. Pull up prefetch on/off to start with, as there's only a single bit name different. Pull up the definitions of common API functions too, starting with flash_set_ws. Even if the implementations are different, things that meant to be the same, should be defined centrally.
2018-07-04stm32l0: include rtc moduleMartin Sivak
2018-07-04doc: use common naming for peripheral apisKarl Palsson
Only applied to STM32 doc trees at present. Instead of declaring a group for "STM32blah" in the doc-blah.h files, and then trying to put all the common+specific peripheral code into those groups, (which is what led to the stub doxygen holder empty .c files) Just use a standard name like "Peripheral APIS" and place everything into that. Demonstrated by converting ADC and USART peripherals, which is definitely not complete, but it shows how to make things less magical, and less prone to copy/paste errors. Now, you can copy/paste and it will do the right thing, because everyone uses the same group names. This is also how to unify the mix of "STM32blah->Periphblah" and _also_ the dangling "periph_file" modules in doxygen, it merges them together properly, as they're intended to be really.
2018-04-29Add DMA support to STM32L0Martin Sivak
STM32L0 uses the same DMA peripheral as STM32F0, F1, L1 and others with some differences. Those are mostly in the number of supported controllers and channels. This patch enables the basic support with no attempt to only expose the available controllers / channels. For more information see the ST Application Note AN2548. Signed-off-by: Martin Sivak <mars@montik.net>
2018-04-29stm32: rework spi, based on PR #740 and #742.Guillaume Revaillot
split spi stuff in three part: - v1 : basic spi peripheral - v1_frf : v1 spi with frf mode additional bit in spi_cr2 / spi_sr - v2 : spi with variable datasize, fifo and other fancy stuff. v1 maps to f1 chips v1_frf to f2, f4 and l0,l1 v2 to f0, f3 and l4 This breaks spi_master_init API for v2 devices : function prototype from common spi header used to be abused, with DFF bit reused for CRCL bit. New v2 spi_master_init does not handle anymore CRCL bits, as it does not usually mess with other crc configuration.
2018-04-29stm32l0: adc: add sample time definitionsKarl Palsson
2018-03-28stm32l0: enable iwdgGuillaume Revaillot
2018-03-08stm32l0: add all new IRQs from later familiesKarl Palsson
2018-03-08stm32l0: NVIC: channel 16 is tim3 on stm32l0x0, stm32l0x1 and stm32l0x2.Guillaume Revaillot
tim3 interrupt is wired to nvic channel 16 if present.
2018-03-03stm32l0:rcc: add rcc_set_pll_source() as per L1Karl Palsson
reported by: kaeipnos in https://github.com/libopencm3/libopencm3/pull/609
2017-10-26stm32:l0: enable usart peripheralKarl Palsson
Now that the usart-v2 peripheral is extracted cleanly, adding it for l0 is very simple.
2017-06-09stm32l0: rcc: Add clock struct setup helperKarl Palsson
Based on l1, l4 and friends.
2017-06-09stm32: rcc: extract osc_bypass functionsKarl Palsson
rcc_osc_bypass_enable and rcc_osc_bypass_disable have been copy/pasted around for the last time! There's a compile bit to check for L0/L1, but otherwise this is just code duplication for no gain.
2017-06-09stm32l0: flash: use common functionalityKarl Palsson
Provides all the basic core functionality shared with L1. No special L0 functionality supported at this point.
2017-03-31stm32: renamed pwr_common_all to pwr_common_v1, and pwr_common_l01 to ↵Matthew Lai
pwr_common_v2
2017-03-31stm32: rcc: add reset reason group flags.Karl Palsson
Originally suggested in https://github.com/libopencm3/libopencm3/pull/399 At least provide macros for each family that allows easy masking of the full set of reset reason flags. Trying to provide a function that provides these in random upper bits seems unclear at best.
2017-03-31stm32l0: rcc: add new peripheral enable bitsKarl Palsson
I2C3, USART4/5, GPIOE
2017-03-31stm32l0: use current RCC bit namesKarl Palsson
Early revisions of the reference manuals used different names for the touch sense controller and firewall bits. These have now been changed to be more in line with other families, and as these parts and bits were new in this library, simply move forward to the current naming convention.
2017-03-31stm32: l0/l4: add i2c supportSergey Matyukevich
According to reference manuals both l0 and l4 have "v2" i2c peripheral. This patch adds i2c support to l0 and l4 using previously unified "v2" i2c headers and implementation. No real hardware has been tested so far. Only compilation tests for both libopencm3 and libopencm3-examples for all stm32 families. Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com>
2017-03-31stm32:rng: add common v1 to l0,l4,f7Karl Palsson
This is a common peripheral based on reference manual inspection.
2016-12-08stm32l0: rcc: fix definition of RCC_CSR_RTCEN bitKarl Palsson
Fixes https://github.com/libopencm3/libopencm3/issues/720
2016-11-29stm32: rcc: Rationalize MCO definitionsKarl Palsson
Some parts used HSICLK, some used HSI. Most used NOCLK, f3 used DISABLED. Try and move all to the shorter, simpler forms, instead of having mixed defines for different targets for the same thing. Just because the bits themselves are different doesn't mean we should make it more difficult for users to port code.
2016-08-19stm32: rcc: rcc_wait_for_osc_ready is always availableKarl Palsson
Move the prototype to the common_all header and include documentation.
2016-08-16stm32l0: Add timer supportEric Kerman
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
2016-03-30stm32l0: land adc-v2 peripheral supportKarl Palsson
Now that the big pieces of the adc-v2 common files are in place, start including l0 in the builds. This includes only the very very basic core v2 peripheral functions, and the very basic definitions.
2015-12-15stm32l/stm32f: name space standardization [BREAKING]Karl Palsson
As done by esden for the F4, remove typedefs and add prefixes to clock enums This extends this to all stm32 families. Let's not hide the fact that these variables are structs/enums. We are filling up the namespace badly enough, we should be prefixing as much as we can with the module names at least. As users we already run often enough in namespace colisions we don't have to make it worse. * CLOCK_3V3_xxx enums renamed to RCC_CLOCK_3V3_xxx * clock enums (PLL, HSI, HSE ...) prefixed with RCC_ * scale enum of pwr module prefixed with PWR_
2015-10-15Surround all macro parameters with ()Karl Palsson
Followup from c72f3d588a637101262d5e2b276dc6cc5d926a6d
2015-10-15Surround all macro parameters with ()Karl Palsson
All the macro arguments that are user supplied, or potentially, wrap properly in () as good practice. Probably missed one or two, and a lot of them are possibly unnecessary, but it's straightforward to just do it always. Fixes github issue #321
2015-10-06stm32l0: Add USB support via st_usbfs driver.Karl Palsson
2015-10-06stm32l0: add EXTI definitionsRobin Kreis
2015-10-06stm32l0: commonize PWR definitions and add to l0Robin Kreis
2015-10-06stm32l0: add LPTIM definitionsRobin Kreis
2015-10-06stm32l0: add SYSCFG definitionsRobin Kreis
Modified to update to latest reference manual. Changes to CFGR3, some extra bits. Signed-off-by: Karl Palsson <karlp@tweak.net.au>
2015-10-06stm32l0: rcc: add more helper routines.Karl Palsson