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{
"irqs": [
"wwdg",
"pvd_pvm",
"tamp_stamp",
"rtc_wkup",
"flash",
"rcc",
"exti0",
"exti1",
"exti2",
"exti3",
"exti4",
"dma1_channel1",
"dma1_channel2",
"dma1_channel3",
"dma1_channel4",
"dma1_channel5",
"dma1_channel6",
"dma1_channel7",
"adc1_2",
"can1_tx",
"can1_rx0",
"can1_rx1",
"can1_sce",
"exti9_5",
"tim1_brk_tim15",
"tim1_up_tim16",
"tim1_trg_com_tim17",
"tim1_cc",
"tim2",
"tim3",
"tim4",
"i2c1_ev",
"i2c1_er",
"i2c2_ev",
"i2c2_er",
"spi1",
"spi2",
"usart1",
"usart2",
"usart3",
"exti15_10",
"rtc_alarm",
"dfsdm3",
"tim8_brk",
"tim8_up",
"tim8_trg_com",
"tim8_cc",
"adc3",
"fmc",
"sdmmc1",
"tim5",
"spi3",
"uart4",
"uart5",
"tim6_dacunder",
"tim7",
"dma2_channel1",
"dma2_channel2",
"dma2_channel3",
"dma2_channel4",
"dma2_channel5",
"dfsdm0",
"dfsdm1",
"dfsdm2",
"comp",
"lptim1",
"lptim2",
"otg_fs",
"dma2_channel6",
"dma2_channel7",
"lpuart1",
"quadspi",
"i2c3_ev",
"i2c3_er",
"sai1",
"sai2",
"swpmi1",
"tsc",
"lcd",
"aes",
"rng",
"fpu"
],
"partname_humanreadable": "STM32 L4 series",
"partname_doxygen": "STM32L4",
"includeguard": "LIBOPENCM3_STM32_L4_NVIC_H"
}
|
