Merge pull request #16 from thirdpin/feature/fix_all_warns

Suppress all implicit conversion warnings

14 files changed, 377 insertions, 419 deletions

diff --git a/cm3cpp/adc.cpp b/cm3cpp/adc.cpp
index 23779dd..104d03b 100644
--- a/cm3cpp/adc.cpp
+++ b/cm3cpp/adc.cpp
@@ -116,18 +116,16 @@ void Adc::set_number_of_conversions(uint8_t number)
 void Adc::set_channel_sampling_time_selection(SamplingTime time,
                                               Channel channel)
 {
-    uint32_t offset;
-
     if (channel < ADC_CHANNEL10) {
-        offset = ((uint8_t)channel * ADC_SMP_MASK);
+        uint32_t offset = (channel * ADC_SMP_MASK);
         ADC_SMPR2(_adc) &= ~(ADC_SMP_MASK << offset);
-        ADC_SMPR2(_adc) |= ((uint8_t)time << offset);
+        ADC_SMPR2(_adc) |= static_cast<uint32_t>(time << offset);
     }
 
     else {
-        offset = (((uint8_t)channel - ADC_CHANNEL10) * ADC_SMP_MASK);
+        uint32_t offset = ((channel - ADC_CHANNEL10) * ADC_SMP_MASK);
         ADC_SMPR1(_adc) &= ~(ADC_SMP_MASK << offset);
-        ADC_SMPR1(_adc) |= ((uint8_t)time << offset);
+        ADC_SMPR1(_adc) |= static_cast<uint32_t>(time << offset);
     }
 }
 
@@ -146,23 +144,27 @@ void Adc::set_conversion_number_in_sequence(uint8_t length, Channel* channel)
 
     for (i = 1; i <= length; i++) {
         if (i <= 6) {
-            first6 |= (channel[i - 1] << ((i - 1) * 5));
+            first6 |= static_cast<uint32_t>(channel[i - 1] << ((i - 1) * 5));
         }
         if ((i > 6) & (i <= 12)) {
-            second6 |= (channel[i - 1] << ((i - 6 - 1) * 5));
+            second6 |=
+              static_cast<uint32_t>(channel[i - 1] << ((i - 6 - 1) * 5));
         }
         if ((i > 12) & (i <= 18)) {
-            third6 |= (channel[i - 1] << ((i - 12 - 1) * 5));
+            third6 |=
+              static_cast<uint32_t>(channel[i - 1] << ((i - 12 - 1) * 5));
         }
         if ((i > 18) & (i <= 24)) {
-            fourth6 |= (channel[i - 1] << ((i - 18 - 1) * 5));
+            fourth6 |=
+              static_cast<uint32_t>(channel[i - 1] << ((i - 18 - 1) * 5));
         }
         if ((i > 24) & (i <= 28)) {
-            fifth6 |= (channel[i - 1] << ((i - 24 - 1) * 5));
+            fifth6 |=
+              static_cast<uint32_t>(channel[i - 1] << ((i - 24 - 1) * 5));
         }
     }
 
-    ADC_SQR1(_adc) = third6 | ((length - 1) << 20);
+    ADC_SQR1(_adc) = third6 | static_cast<uint32_t>((length - 1) << 20);
     ADC_SQR2(_adc) = second6;
     ADC_SQR3(_adc) = first6;
 }
@@ -170,25 +172,25 @@ void Adc::set_conversion_number_in_sequence(uint8_t length, Channel* channel)
 void Adc::set_prescaler(Prescaler prescaler)
 {
     ADC_CCR &= ~ADC_CCR_ADCPRE_MASK;
-    ADC_CCR |= (uint32_t)prescaler;
+    ADC_CCR |= prescaler;
 }
 
 void Adc::set_dma_mode(DmaMode mode)
 {
     ADC_CCR &= ~ADC_CCR_DMA_MASK;
-    ADC_CCR |= (uint32_t)mode;
+    ADC_CCR |= mode;
 }
 
 void Adc::set_delay_between_two_samples(Delay delay)
 {
     ADC_CCR &= ~ADC_CCR_DELAY_MASK;
-    ADC_CCR |= (uint32_t)delay;
+    ADC_CCR |= delay;
 }
 
 void Adc::set_multi_mode(MultiMode mode)
 {
     ADC_CCR &= ~ADC_CCR_MULTI_MASK;
-    ADC_CCR |= (uint32_t)mode;
+    ADC_CCR |= mode;
 }
 
 void Adc::enable_temp_sensor()
diff --git a/cm3cpp/adc.hpp b/cm3cpp/adc.hpp
index 416a82e..2b0bcd0 100644
--- a/cm3cpp/adc.hpp
+++ b/cm3cpp/adc.hpp
@@ -179,12 +179,12 @@ class Adc
         SINGLE_CONV,
     };
 
-    enum MultiMode
+    enum MultiMode : uint32_t
     {
         MODE_INDEPENDENT = 0,
     };
 
-    enum SamplingTime
+    enum SamplingTime: uint8_t
     {
         CYCLES_3 = 0,
         CYCLES_15 = 1,
@@ -196,7 +196,7 @@ class Adc
         CYCLES_480 = 7,
     };
 
-    enum Channel
+    enum Channel: uint8_t
     {
         ADC_CHANNEL0 = 0x00,
         ADC_CHANNEL1 = 0x01,
@@ -239,7 +239,7 @@ class Adc
         RANK_16 = 16,
     };
 
-    enum Prescaler
+    enum Prescaler : uint32_t
     {
         PRESCALER_2 = (uint32_t)(0 << 16),
         PRESCALER_4 = (uint32_t)(1 << 16),
@@ -247,7 +247,7 @@ class Adc
         PRESCALER_8 = (uint32_t)(3 << 16),
     };
 
-    enum DmaMode
+    enum DmaMode : uint32_t
     {
         MODE_NONE = (uint32_t)(0 << 14),
         MODE_1 = (uint32_t)(1 << 14),
@@ -255,7 +255,7 @@ class Adc
         MODE_3 = (uint32_t)(3 << 14),
     };
 
-    enum Delay
+    enum Delay : uint32_t
     {
         DELAY_CYCLES_5 = (uint32_t)(0 << 8),
         DELAY_CYCLES_6 = (uint32_t)(1 << 8),
diff --git a/cm3cpp/adc_dma.hpp b/cm3cpp/adc_dma.hpp
index 0c059ca..4fe890d 100644
--- a/cm3cpp/adc_dma.hpp
+++ b/cm3cpp/adc_dma.hpp
@@ -17,7 +17,7 @@ class AdcDma
     struct DmaConf
     {
         uint32_t number;
-        uint32_t stream;
+        uint8_t stream;
         uint32_t channel;
     };
 
diff --git a/cm3cpp/extra/one_wire.cpp b/cm3cpp/extra/one_wire.cpp
index e384908..20eda3d 100644
--- a/cm3cpp/extra/one_wire.cpp
+++ b/cm3cpp/extra/one_wire.cpp
@@ -38,7 +38,7 @@ uint8_t OneWire::read_byte(void)
         _wait(_READ_SAMPLE_WAIT_US);
 
         /*sample bus and shift into msb*/
-        data = data >> 1;
+        data = static_cast<uint8_t>(data >> 1);
         if (_pinout.get() != 0)
             data |= 0x80;
 
@@ -61,7 +61,7 @@ void OneWire::write_byte(uint8_t data)
 
         /*write next bit*/
         ((bool)(data & 0x01)) ? _pinout.set() : _pinout.clear();
-        data = data >> 1;
+        data = static_cast<uint8_t>(data >> 1);
 
         /*wait until end of slot*/
         _wait(_WRITE_SLOT_WAIT_US);
@@ -191,8 +191,9 @@ bool OneWire::search_next(bool do_reset, bool alarm_only)
         // loop to do the search
         do {
             // read a bit and its compliment
-            bit_test = ((uint8_t)read_bit()) << 1;
-            bit_test |= ((uint8_t)read_bit());
+            bit_test = static_cast<uint8_t>(uint8_t(read_bit()) << 1);
+            bit_test =
+              static_cast<uint8_t>(bit_test | static_cast<uint8_t>(read_bit()));
 
             // check for no devices on 1-wire
             if (bit_test == 3)
@@ -227,7 +228,8 @@ bool OneWire::search_next(bool do_reset, bool alarm_only)
                 if (search_direction == 1)
                     _serial[serial_byte_number] |= serial_byte_mask;
                 else
-                    _serial[serial_byte_number] &= ~serial_byte_mask;
+                    _serial[serial_byte_number] = static_cast<uint8_t>(
+                      _serial[serial_byte_number] & ~serial_byte_mask);
 
                 // serial number search direction write bit
                 write_bit((bool)search_direction);
@@ -235,7 +237,7 @@ bool OneWire::search_next(bool do_reset, bool alarm_only)
                 // increment the byte counter bit_number
                 // and shift the mask serial_byte_mask
                 bit_number++;
-                serial_byte_mask <<= 1;
+                serial_byte_mask = static_cast<uint8_t>(serial_byte_mask << 1);
 
                 // if the mask is 0 then go to new SerialNum[portnum] byte
                 // serial_byte_number and reset mask
@@ -304,14 +306,14 @@ void OneWire::_crc_check(uint8_t data, uint8_t* crc_byte)
 
     for (uint8_t bit_count = 0; bit_count < 8; bit_count++) {
         if ((data & 0x01) ^ (tmp & 0x01)) {
-            tmp = tmp >> 1;
+            tmp = static_cast<uint8_t>(tmp >> 1);
             tmp = tmp ^ 0x8c;  // 0b10001100;
         }
         else {
-            tmp = tmp >> 1;
+            tmp = static_cast<uint8_t>(tmp >> 1);
         }
 
-        data = data >> 1;
+        data = static_cast<uint8_t>(data >> 1);
     }
 
     *crc_byte = tmp;
diff --git a/cm3cpp/extra/one_wire.hpp b/cm3cpp/extra/one_wire.hpp
index 6ad1af4..2a8e1f7 100644
--- a/cm3cpp/extra/one_wire.hpp
+++ b/cm3cpp/extra/one_wire.hpp
@@ -50,8 +50,8 @@ class OneWire
     Timer _timer;
     uint8_t _serial[_SERIAL_LENGTH];
 
-    int8_t _last_discrepancy;
-    int8_t _last_family_discrepancy;
+    uint8_t _last_discrepancy;
+    uint8_t _last_family_discrepancy;
     bool _last_device;
 
     void _wait(uint16_t time);
diff --git a/cm3cpp/i2c.cpp b/cm3cpp/i2c.cpp
index 9e74ddf..9c08f5a 100644
--- a/cm3cpp/i2c.cpp
+++ b/cm3cpp/i2c.cpp
@@ -108,7 +108,7 @@ void I2c::set_address_mode(AddressMode mode)
 {
     switch (mode) {
         case ADDRESS_MODE_7BIT:
-            I2C_OAR1(_i2c) &= ~I2C_OAR1_ADDMODE;
+            I2C_OAR1(_i2c) &= ~static_cast<uint32_t>(I2C_OAR1_ADDMODE);
             break;
         case ADDRESS_MODE_10BIT:
             I2C_OAR1(_i2c) |= I2C_OAR1_ADDMODE;
diff --git a/cm3cpp/i2c.hpp b/cm3cpp/i2c.hpp
index 219217b..dc04771 100644
--- a/cm3cpp/i2c.hpp
+++ b/cm3cpp/i2c.hpp
@@ -152,7 +152,7 @@ class I2c
 
     struct MasterTransferCfg
     {
-        uint16_t device_address;
+        uint8_t device_address;
         uint8_t* write_buf;
         uint8_t write_len;
         uint8_t read_len;
diff --git a/cm3cpp/rs485.hpp b/cm3cpp/rs485.hpp
index ea9865e..7e14fff 100644
--- a/cm3cpp/rs485.hpp
+++ b/cm3cpp/rs485.hpp
@@ -27,6 +27,8 @@ RS485 implementation, public interface
 #define RS_485_H
 
 #include <stdint.h>
+#include <cassert>
+#include <limits>
 
 #include <libopencm3/stm32/usart.h>
 #ifdef STM32F2
@@ -77,7 +79,10 @@ class RS485
 
     void usart_enable_tc_interrupt() { USART_CR1(_rs485) |= USART_CR1_TCIE; }
 
-    void usart_disable_tc_interrupt() { USART_CR1(_rs485) &= ~USART_CR1_TCIE; }
+    void usart_disable_tc_interrupt()
+    {
+        USART_CR1(_rs485) &= ~static_cast<uint32_t>(USART_CR1_TCIE);
+    }
 
     bool interrupt_source_RXNE()
     {
@@ -106,7 +111,12 @@ class RS485
     void receive_handler()
     {
         if (interrupt_source_RXNE()) {
-            rb_in->push(usart_recv(_rs485));
+            using byte_t = uint8_t;
+
+            const uint16_t byte16 = usart_recv(_rs485);
+            assert(byte16 < std::numeric_limits<byte_t>::max());
+
+            rb_in->push(static_cast<byte_t>(byte16));
         }
     }
 
diff --git a/cm3cpp/spi.hpp b/cm3cpp/spi.hpp
index ebe2148..eb18e4c 100644
--- a/cm3cpp/spi.hpp
+++ b/cm3cpp/spi.hpp
@@ -157,12 +157,17 @@ class Spi
 
     uint16_t read(uint16_t data)
     {
-        while (!get_flag_status(Flag::TRANSMIT_BUFFER_EMPTY))
-            ;
+        while (!get_flag_status(Flag::TRANSMIT_BUFFER_EMPTY)) {
+            __asm__("nop");
+        }
+
         SPI_DR(_spi) = data;
-        while (!get_flag_status(Flag::RECEIVE_BUFFER_NOT_EMPTY))
-            ;
-        return SPI_DR(_spi);
+
+        while (!get_flag_status(Flag::RECEIVE_BUFFER_NOT_EMPTY)) {
+            __asm__("nop");
+        }
+
+        return static_cast<uint16_t>(SPI_DR(_spi));
     }
 
     void set_master_mode() { spi_set_master_mode(_spi); }
diff --git a/cm3cpp/timer.cpp b/cm3cpp/timer.cpp
index e2711e9..b494dd2 100644
--- a/cm3cpp/timer.cpp
+++ b/cm3cpp/timer.cpp
@@ -29,31 +29,38 @@ namespace cm3cpp {
 
 namespace tim {
 
+/** Helper for make explicit opencm3 defined constants conversions */
+template<typename T>
+constexpr uint32_t to_u32(T t)
+{
+    return static_cast<uint32_t>(t);
+}
+
 // 1,2,3,4,5,6,7,8,9,10,11,12,13,14
 auto Timer::enable_counter() -> Result
 {
-    TIM_CR1(_timer) |= TIM_CR1_CEN;
+    TIM_CR1(_timer) |= to_u32(TIM_CR1_CEN);
     return OK;
 }
 
 // 1,2,3,4,5,6,7,8,9,10,11,12,13,14
 auto Timer::disable_counter() -> Result
 {
-    TIM_CR1(_timer) &= ~TIM_CR1_CEN;
+    TIM_CR1(_timer) &= ~to_u32(TIM_CR1_CEN);
     return OK;
 }
 
 // 1,2,3,4,5,6,7,8,9,10,11,12,13,14
 auto Timer::enable_update_event_generation() -> Result
 {
-    TIM_CR1(_timer) &= ~TIM_CR1_UDIS;
+    TIM_CR1(_timer) &= ~to_u32(TIM_CR1_UDIS);
     return OK;
 }
 
 // 1,2,3,4,5,6,7,8,9,10,11,12,13,14
 auto Timer::disable_update_event_generation() -> Result
 {
-    TIM_CR1(_timer) |= TIM_CR1_UDIS;
+    TIM_CR1(_timer) |= to_u32(TIM_CR1_UDIS);
     return OK;
 }
 
@@ -62,7 +69,7 @@ auto Timer::set_update_event_source(UevSource source) -> Result
 {
     switch (source) {
         case COUNTER_OVERFLOW_AND_UG:
-            TIM_CR1(_timer) &= ~TIM_CR1_URS;
+            TIM_CR1(_timer) &= ~to_u32(TIM_CR1_URS);
             break;
         case COUNTER_OVERFLOW:
             TIM_CR1(_timer) |= TIM_CR1_URS;
@@ -80,7 +87,7 @@ auto Timer::set_counter_mode(CounterMode mode) -> Result
             TIM_CR1(_timer) |= TIM_CR1_OPM;
             break;
         case CONTINUOUS:
-            TIM_CR1(_timer) &= ~TIM_CR1_OPM;
+            TIM_CR1(_timer) &= ~to_u32(TIM_CR1_OPM);
             break;
     }
 
@@ -97,7 +104,7 @@ auto Timer::set_counter_direction(CounterDirection dir) -> Result
 
     switch (dir) {
         case UP:
-            TIM_CR1(_timer) &= ~TIM_CR1_DIR_DOWN;
+            TIM_CR1(_timer) &= ~to_u32(TIM_CR1_DIR_DOWN);
             break;
         case DOWN:
             TIM_CR1(_timer) |= TIM_CR1_DIR_DOWN;
@@ -116,32 +123,29 @@ auto Timer::set_alignment(Alignment alignment) -> Result
     }
 
     bool counter_enable = TIM_CR1(_timer) & TIM_CR1_CEN;
+    const auto cms_clear_mask = TIM_CR1(_timer) & ~to_u32(TIM_CR1_CMS_MASK);
 
     switch (alignment) {
         case EDGE:
-            TIM_CR1(_timer) =
-              (TIM_CR1(_timer) & ~TIM_CR1_CMS_MASK) | TIM_CR1_CMS_EDGE;
+            TIM_CR1(_timer) = cms_clear_mask | TIM_CR1_CMS_EDGE;
             return OK;
         case CENTER_DOWN:
             if (counter_enable) {
                 return USAGE_ERROR;
             }
-            TIM_CR1(_timer) =
-              (TIM_CR1(_timer) & ~TIM_CR1_CMS_MASK) | TIM_CR1_CMS_CENTER_1;
+            TIM_CR1(_timer) = cms_clear_mask | TIM_CR1_CMS_CENTER_1;
             return OK;
         case CENTER_UP:
             if (counter_enable) {
                 return USAGE_ERROR;
             }
-            TIM_CR1(_timer) =
-              (TIM_CR1(_timer) & ~TIM_CR1_CMS_MASK) | TIM_CR1_CMS_CENTER_2;
+            TIM_CR1(_timer) = cms_clear_mask | TIM_CR1_CMS_CENTER_2;
             return OK;
         case CENTER_UP_DOWN:
             if (counter_enable) {
                 return USAGE_ERROR;
             }
-            TIM_CR1(_timer) =
-              (TIM_CR1(_timer) & ~TIM_CR1_CMS_MASK) | TIM_CR1_CMS_CENTER_3;
+            TIM_CR1(_timer) = cms_clear_mask | TIM_CR1_CMS_CENTER_3;
             return OK;
     }
 
@@ -158,7 +162,7 @@ auto Timer::enable_autoreload_preload() -> Result
 // 1,2,3,4,5,6,7,8,9,10,11,12,13,14
 auto Timer::disable_autoreload_preload() -> Result
 {
-    TIM_CR1(_timer) &= ~TIM_CR1_ARPE;
+    TIM_CR1(_timer) &= ~to_u32(TIM_CR1_ARPE);
     return OK;
 }
 
@@ -169,18 +173,18 @@ auto Timer::set_clock_division(ClockDivision div) -> Result
         return USAGE_ERROR;
     }
 
+    const auto ckd_ck_int_clear_mask =
+      TIM_CR1(_timer) & ~to_u32(TIM_CR1_CKD_CK_INT_MASK);
+
     switch (div) {
         case TIMER_CLOCK_MUL_1:
-            TIM_CR1(_timer) =
-              (TIM_CR1(_timer) & ~TIM_CR1_CKD_CK_INT_MASK) | TIM_CR1_CKD_CK_INT;
+            TIM_CR1(_timer) = ckd_ck_int_clear_mask | TIM_CR1_CKD_CK_INT;
             break;
         case TIMER_CLOCK_MUL_2:
-            TIM_CR1(_timer) = (TIM_CR1(_timer) & ~TIM_CR1_CKD_CK_INT_MASK) |
-                              TIM_CR1_CKD_CK_INT_MUL_2;
+            TIM_CR1(_timer) = ckd_ck_int_clear_mask | TIM_CR1_CKD_CK_INT_MUL_2;
             break;
         case TIMER_CLOCK_MUL_4:
-            TIM_CR1(_timer) = (TIM_CR1(_timer) & ~TIM_CR1_CKD_CK_INT_MASK) |
-                              TIM_CR1_CKD_CK_INT_MUL_4;
+            TIM_CR1(_timer) = ckd_ck_int_clear_mask | TIM_CR1_CKD_CK_INT_MUL_4;
             break;
     }
 
@@ -190,38 +194,32 @@ auto Timer::set_clock_division(ClockDivision div) -> Result
 // 9,12
 auto Timer::set_master_mode(MasterMode mode) -> Result
 {
+    const auto mms_clear_mask = TIM_CR2(_timer) & ~to_u32(TIM_CR2_MMS_MASK);
+
     switch (mode) {
         case MASTER_RESET:
-            TIM_CR2(_timer) =
-              (TIM_CR2(_timer) & ~TIM_CR2_MMS_MASK) | TIM_CR2_MMS_RESET;
+            TIM_CR2(_timer) = mms_clear_mask | TIM_CR2_MMS_RESET;
             break;
         case ENABLE:
-            TIM_CR2(_timer) =
-              (TIM_CR2(_timer) & ~TIM_CR2_MMS_MASK) | TIM_CR2_MMS_ENABLE;
+            TIM_CR2(_timer) = mms_clear_mask | TIM_CR2_MMS_ENABLE;
             break;
         case UPDATE:
-            TIM_CR2(_timer) =
-              (TIM_CR2(_timer) & ~TIM_CR2_MMS_MASK) | TIM_CR2_MMS_UPDATE;
+            TIM_CR2(_timer) = mms_clear_mask | TIM_CR2_MMS_UPDATE;
             break;
         case COMPARE_PULSE:
-            TIM_CR2(_timer) =
-              (TIM_CR2(_timer) & ~TIM_CR2_MMS_MASK) | TIM_CR2_MMS_COMPARE_PULSE;
+            TIM_CR2(_timer) = mms_clear_mask | TIM_CR2_MMS_COMPARE_PULSE;
             break;
         case COMPARE_OC1REF:
-            TIM_CR2(_timer) = (TIM_CR2(_timer) & ~TIM_CR2_MMS_MASK) |
-                              TIM_CR2_MMS_COMPARE_OC1REF;
+            TIM_CR2(_timer) = mms_clear_mask | TIM_CR2_MMS_COMPARE_OC1REF;
             break;
         case COMPARE_OC2REF:
-            TIM_CR2(_timer) = (TIM_CR2(_timer) & ~TIM_CR2_MMS_MASK) |
-                              TIM_CR2_MMS_COMPARE_OC2REF;
+            TIM_CR2(_timer) = mms_clear_mask | TIM_CR2_MMS_COMPARE_OC2REF;
             break;
         case COMPARE_OC3REF:
-            TIM_CR2(_timer) = (TIM_CR2(_timer) & ~TIM_CR2_MMS_MASK) |
-                              TIM_CR2_MMS_COMPARE_OC3REF;
+            TIM_CR2(_timer) = mms_clear_mask | TIM_CR2_MMS_COMPARE_OC3REF;
             break;
         case COMPARE_OC4REF:
-            TIM_CR2(_timer) = (TIM_CR2(_timer) & ~TIM_CR2_MMS_MASK) |
-                              TIM_CR2_MMS_COMPARE_OC4REF;
+            TIM_CR2(_timer) = mms_clear_mask | TIM_CR2_MMS_COMPARE_OC4REF;
             break;
     }
 
@@ -231,29 +229,26 @@ auto Timer::set_master_mode(MasterMode mode) -> Result
 // 9,12
 auto Timer::set_slave_mode(SlaveMode mode) -> Result
 {
+    const auto clear_sms_mask = TIM_SMCR(_timer) & ~to_u32(TIM_SMCR_SMS_MASK);
+
     switch (mode) {
         case DISABLED:
-            TIM_SMCR(_timer) =
-              (TIM_SMCR(_timer) & ~TIM_SMCR_SMS_MASK) | TIM_SMCR_SMS_OFF;
+            TIM_SMCR(_timer) = clear_sms_mask | TIM_SMCR_SMS_OFF;
             break;
         case SLAVE_RESET:
-            TIM_SMCR(_timer) =
-              (TIM_SMCR(_timer) & ~TIM_SMCR_SMS_MASK) | TIM_SMCR_SMS_RM;
+            TIM_SMCR(_timer) = clear_sms_mask | TIM_SMCR_SMS_RM;
             break;
         case GATED:
             if (TIM_SMCR(_timer) & TIM_SMCR_TS_TI1F_ED) {
                 return USAGE_ERROR;
             }
-            TIM_SMCR(_timer) =
-              (TIM_SMCR(_timer) & ~TIM_SMCR_SMS_MASK) | TIM_SMCR_SMS_GM;
+            TIM_SMCR(_timer) = clear_sms_mask | TIM_SMCR_SMS_GM;
             break;
         case TRIGGER:
-            TIM_SMCR(_timer) =
-              (TIM_SMCR(_timer) & ~TIM_SMCR_SMS_MASK) | TIM_SMCR_SMS_TM;
+            TIM_SMCR(_timer) = clear_sms_mask | TIM_SMCR_SMS_TM;
             break;
         case EXTERNAL_CLOCK:
-            TIM_SMCR(_timer) =
-              (TIM_SMCR(_timer) & ~TIM_SMCR_SMS_MASK) | TIM_SMCR_SMS_ECM1;
+            TIM_SMCR(_timer) = clear_sms_mask | TIM_SMCR_SMS_ECM1;
             break;
     }
 
@@ -263,34 +258,29 @@ auto Timer::set_slave_mode(SlaveMode mode) -> Result
 // 9,12
 auto Timer::set_trigger(Trigger trigger) -> Result
 {
+    const auto clear_ts_mask = TIM_SMCR(_timer) & ~to_u32(TIM_SMCR_TS_MASK);
+
     switch (trigger) {
         case INTERNAL_TRIGGER_0:
-            TIM_SMCR(_timer) =
-              (TIM_SMCR(_timer) & ~TIM_SMCR_TS_MASK) | TIM_SMCR_TS_ITR0;
+            TIM_SMCR(_timer) = clear_ts_mask | TIM_SMCR_TS_ITR0;
             break;
         case INTERNAL_TRIGGER_1:
-            TIM_SMCR(_timer) =
-              (TIM_SMCR(_timer) & ~TIM_SMCR_TS_MASK) | TIM_SMCR_TS_ITR1;
+            TIM_SMCR(_timer) = clear_ts_mask | TIM_SMCR_TS_ITR1;
             break;
         case INTERNAL_TRIGGER_2:
-            TIM_SMCR(_timer) =
-              (TIM_SMCR(_timer) & ~TIM_SMCR_TS_MASK) | TIM_SMCR_TS_ITR2;
+            TIM_SMCR(_timer) = clear_ts_mask | TIM_SMCR_TS_ITR2;
             break;
         case INTERNAL_TRIGGER_3:
-            TIM_SMCR(_timer) =
-              (TIM_SMCR(_timer) & ~TIM_SMCR_TS_MASK) | TIM_SMCR_TS_ITR3;
+            TIM_SMCR(_timer) = clear_ts_mask | TIM_SMCR_TS_ITR3;
             break;
         case EDGE_DETECTOR:
-            TIM_SMCR(_timer) =
-              (TIM_SMCR(_timer) & ~TIM_SMCR_TS_MASK) | TIM_SMCR_TS_TI1F_ED;
+            TIM_SMCR(_timer) = clear_ts_mask | TIM_SMCR_TS_TI1F_ED;
             break;
         case FILTERED_TIMER_INPUT_1:
-            TIM_SMCR(_timer) =
-              (TIM_SMCR(_timer) & ~TIM_SMCR_TS_MASK) | TIM_SMCR_TS_TI1FP1;
+            TIM_SMCR(_timer) = clear_ts_mask | TIM_SMCR_TS_TI1FP1;
             break;
         case FILTERED_TIMER_INPUT_2:
-            TIM_SMCR(_timer) =
-              (TIM_SMCR(_timer) & ~TIM_SMCR_TS_MASK) | TIM_SMCR_TS_TI2FP2;
+            TIM_SMCR(_timer) = clear_ts_mask | TIM_SMCR_TS_TI2FP2;
             break;
     }
 
@@ -307,7 +297,7 @@ auto Timer::enable_master_slave_mode() -> Result
 // 9,12
 auto Timer::disable_master_slave_mode() -> Result
 {
-    TIM_SMCR(_timer) &= ~TIM_SMCR_MSM;
+    TIM_SMCR(_timer) &= ~to_u32(TIM_SMCR_MSM);
     return OK;
 }
 
@@ -321,7 +311,7 @@ auto Timer::enable_update_interrupt() -> Result
 // 9,12
 auto Timer::disable_update_interrupt() -> Result
 {
-    TIM_DIER(_timer) &= ~TIM_DIER_UIE;
+    TIM_DIER(_timer) &= ~to_u32(TIM_DIER_UIE);
     return OK;
 }
 
@@ -335,7 +325,7 @@ auto Timer::enable_capture_compare_1_interrupt() -> Result
 // 9,12
 auto Timer::disable_capture_compare_1_interrupt() -> Result
 {
-    TIM_DIER(_timer) &= ~TIM_DIER_CC1IE;
+    TIM_DIER(_timer) &= ~to_u32(TIM_DIER_CC1IE);
     return OK;
 }
 
@@ -349,7 +339,7 @@ auto Timer::enable_capture_compare_2_interrupt() -> Result
 // 9,12
 auto Timer::disable_capture_compare_2_interrupt() -> Result
 {
-    TIM_DIER(_timer) &= ~TIM_DIER_CC2IE;
+    TIM_DIER(_timer) &= ~to_u32(TIM_DIER_CC2IE);
     return OK;
 }
 
@@ -362,7 +352,7 @@ auto Timer::enable_capture_compare_3_interrupt() -> Result
 // 9,12
 auto Timer::disable_capture_compare_3_interrupt() -> Result
 {
-    TIM_DIER(_timer) &= ~TIM_DIER_CC3IE;
+    TIM_DIER(_timer) &= ~to_u32(TIM_DIER_CC3IE);
     return OK;
 }
 
@@ -376,7 +366,7 @@ auto Timer::enable_capture_compare_4_interrupt() -> Result
 // 9,12
 auto Timer::disable_capture_compare_4_interrupt() -> Result
 {
-    TIM_DIER(_timer) &= ~TIM_DIER_CC4IE;
+    TIM_DIER(_timer) &= ~to_u32(TIM_DIER_CC4IE);
     return OK;
 }
 
@@ -390,7 +380,7 @@ auto Timer::enable_trigger_interrupt() -> Result
 // 9,12
 auto Timer::disable_trigger_interrupt() -> Result
 {
-    TIM_DIER(_timer) &= ~TIM_DIER_TIE;
+    TIM_DIER(_timer) &= ~to_u32(TIM_DIER_TIE);
     return OK;
 }
 
@@ -440,34 +430,34 @@ auto Timer::clear_flag_status(Flag flag) -> Result
 {
     switch (flag) {
         case UPDATE_INTERRUPT:
-            TIM_SR(_timer) &= ~TIM_SR_UIF;
+            TIM_SR(_timer) &= ~to_u32(TIM_SR_UIF);
             break;
         case CAPTURE_COMPARE_1_INTERRUPT:
-            TIM_SR(_timer) &= ~TIM_SR_CC1IF;
+            TIM_SR(_timer) &= ~to_u32(TIM_SR_CC1IF);
             break;
         case CAPTURE_COMPARE_2_INTERRUPT:
-            TIM_SR(_timer) &= ~TIM_SR_CC2IF;
+            TIM_SR(_timer) &= ~to_u32(TIM_SR_CC2IF);
             break;
         case CAPTURE_COMPARE_3_INTERRUPT:
-            TIM_SR(_timer) &= ~TIM_SR_CC3IF;
+            TIM_SR(_timer) &= ~to_u32(TIM_SR_CC3IF);
             break;
         case CAPTURE_COMPARE_4_INTERRUPT:
-            TIM_SR(_timer) &= ~TIM_SR_CC4IF;
+            TIM_SR(_timer) &= ~to_u32(TIM_SR_CC4IF);
             break;
         case TRIGGER_INTERRUPT:
-            TIM_SR(_timer) &= ~TIM_SR_TIF;
+            TIM_SR(_timer) &= ~to_u32(TIM_SR_TIF);
             break;
         case CAPTURE_COMPARE_1_OVERCAPTURE:
-            TIM_SR(_timer) &= ~TIM_SR_CC1OF;
+            TIM_SR(_timer) &= ~to_u32(TIM_SR_CC1OF);
             break;
         case CAPTURE_COMPARE_2_OVERCAPTURE:
-            TIM_SR(_timer) &= ~TIM_SR_CC2OF;
+            TIM_SR(_timer) &= ~to_u32(TIM_SR_CC2OF);
             break;
         case CAPTURE_COMPARE_3_OVERCAPTURE:
-            TIM_SR(_timer) &= ~TIM_SR_CC3OF;
+            TIM_SR(_timer) &= ~to_u32(TIM_SR_CC3OF);
             break;
         case CAPTURE_COMPARE_4_OVERCAPTURE:
-            TIM_SR(_timer) &= ~TIM_SR_CC4OF;
+            TIM_SR(_timer) &= ~to_u32(TIM_SR_CC4OF);
             break;
     }
 
@@ -488,22 +478,21 @@ auto Timer::set_capture_compare_1_mode(CcMode mode) -> Result
         return USAGE_ERROR;
     }
 
+    const uint32_t cc1s_clear_mask =
+      TIM_CCMR1(_timer) & ~to_u32(TIM_CCMR1_CC1S_MASK);
+
     switch (mode) {
         case OUTPUT:
-            TIM_CCMR1(_timer) =
-              (TIM_CCMR1(_timer) & ~TIM_CCMR1_CC1S_MASK) | TIM_CCMR1_CC1S_OUT;
+            TIM_CCMR1(_timer) = cc1s_clear_mask | TIM_CCMR1_CC1S_OUT;
             break;
         case INPUT_MAPPED_TI1:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_CC1S_MASK) |
-                                TIM_CCMR1_CC1S_IN_TI1;
+            TIM_CCMR1(_timer) = cc1s_clear_mask | TIM_CCMR1_CC1S_IN_TI1;
             break;
         case INPUT_MAPPED_TI2:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_CC1S_MASK) |
-                                TIM_CCMR1_CC1S_IN_TI2;
+            TIM_CCMR1(_timer) = cc1s_clear_mask | TIM_CCMR1_CC1S_IN_TI2;
             break;
         case INPUT_MAPPED_TRC:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_CC1S_MASK) |
-                                TIM_CCMR1_CC1S_IN_TRC;
+            TIM_CCMR1(_timer) = cc1s_clear_mask | TIM_CCMR1_CC1S_IN_TRC;
             break;
 
         default:
@@ -522,22 +511,21 @@ auto Timer::set_capture_compare_2_mode(CcMode mode) -> Result
         return USAGE_ERROR;
     }
 
+    const uint32_t cc2s_clear_mask =
+      TIM_CCMR1(_timer) & ~to_u32(TIM_CCMR1_CC2S_MASK);
+
     switch (mode) {
         case OUTPUT:
-            TIM_CCMR1(_timer) =
-              (TIM_CCMR1(_timer) & ~TIM_CCMR1_CC2S_MASK) | TIM_CCMR1_CC2S_OUT;
+            TIM_CCMR1(_timer) = cc2s_clear_mask | TIM_CCMR1_CC2S_OUT;
             break;
         case INPUT_MAPPED_TI1:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_CC2S_MASK) |
-                                TIM_CCMR1_CC2S_IN_TI1;
+            TIM_CCMR1(_timer) = cc2s_clear_mask | TIM_CCMR1_CC2S_IN_TI1;
             break;
         case INPUT_MAPPED_TI2:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_CC2S_MASK) |
-                                TIM_CCMR1_CC2S_IN_TI2;
+            TIM_CCMR1(_timer) = cc2s_clear_mask | TIM_CCMR1_CC2S_IN_TI2;
             break;
         case INPUT_MAPPED_TRC:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_CC2S_MASK) |
-                                TIM_CCMR1_CC2S_IN_TRC;
+            TIM_CCMR1(_timer) = cc2s_clear_mask | TIM_CCMR1_CC2S_IN_TRC;
             break;
 
         default:
@@ -556,22 +544,21 @@ auto Timer::set_input_capture_1_prescaler(Prescaler prescaler) -> Result
         return USAGE_ERROR;
     }
 
+    const uint32_t ic1psc_clear_mask =
+      TIM_CCMR1(_timer) & ~to_u32(TIM_CCMR1_IC1PSC_MASK);
+
     switch (prescaler) {
         case NO_PRESCALER:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1PSC_MASK) |
-                                TIM_CCMR1_IC1PSC_OFF;
+            TIM_CCMR1(_timer) = ic1psc_clear_mask | TIM_CCMR1_IC1PSC_OFF;
             break;
         case CAPTURE_EVERY_2_EVENTS:
-            TIM_CCMR1(_timer) =
-              (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1PSC_MASK) | TIM_CCMR1_IC1PSC_2;
+            TIM_CCMR1(_timer) = ic1psc_clear_mask | TIM_CCMR1_IC1PSC_2;
             break;
         case CAPTURE_EVERY_4_EVENTS:
-            TIM_CCMR1(_timer) =
-              (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1PSC_MASK) | TIM_CCMR1_IC1PSC_4;
+            TIM_CCMR1(_timer) = ic1psc_clear_mask | TIM_CCMR1_IC1PSC_4;
             break;
         case CAPTURE_EVERY_8_EVENTS:
-            TIM_CCMR1(_timer) =
-              (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1PSC_MASK) | TIM_CCMR1_IC1PSC_8;
+            TIM_CCMR1(_timer) = ic1psc_clear_mask | TIM_CCMR1_IC1PSC_8;
             break;
     }
 
@@ -587,22 +574,21 @@ auto Timer::set_input_capture_2_prescaler(Prescaler prescaler) -> Result
         return USAGE_ERROR;
     }
 
+    const uint32_t ic2psc_clear_mask =
+      TIM_CCMR1(_timer) & ~to_u32(TIM_CCMR1_IC2PSC_MASK);
+
     switch (prescaler) {
         case NO_PRESCALER:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2PSC_MASK) |
-                                TIM_CCMR1_IC2PSC_OFF;
+            TIM_CCMR1(_timer) = ic2psc_clear_mask | TIM_CCMR1_IC2PSC_OFF;
             break;
         case CAPTURE_EVERY_2_EVENTS:
-            TIM_CCMR1(_timer) =
-              (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2PSC_MASK) | TIM_CCMR1_IC2PSC_2;
+            TIM_CCMR1(_timer) = ic2psc_clear_mask | TIM_CCMR1_IC2PSC_2;
             break;
         case CAPTURE_EVERY_4_EVENTS:
-            TIM_CCMR1(_timer) =
-              (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2PSC_MASK) | TIM_CCMR1_IC2PSC_4;
+            TIM_CCMR1(_timer) = ic2psc_clear_mask | TIM_CCMR1_IC2PSC_4;
             break;
         case CAPTURE_EVERY_8_EVENTS:
-            TIM_CCMR1(_timer) =
-              (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2PSC_MASK) | TIM_CCMR1_IC2PSC_8;
+            TIM_CCMR1(_timer) = ic2psc_clear_mask | TIM_CCMR1_IC2PSC_8;
             break;
     }
 
@@ -618,70 +604,57 @@ auto Timer::set_input_capture_1_filter(Filter filter) -> Result
         return USAGE_ERROR;
     }
 
+    const uint32_t ic1f_clear_mask =
+      TIM_CCMR1(_timer) & ~to_u32(TIM_CCMR1_IC1F_MASK);
+
     switch (filter) {
         case NO_FILTER:
-            TIM_CCMR1(_timer) =
-              (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) | TIM_CCMR1_IC1F_OFF;
+            TIM_CCMR1(_timer) = ic1f_clear_mask | TIM_CCMR1_IC1F_OFF;
             break;
         case CK_INT_N_2:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-                                TIM_CCMR1_IC1F_CK_INT_N_2;
+            TIM_CCMR1(_timer) = ic1f_clear_mask | TIM_CCMR1_IC1F_CK_INT_N_2;
             break;
         case CK_INT_N_4:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-                                TIM_CCMR1_IC1F_CK_INT_N_4;
+            TIM_CCMR1(_timer) = ic1f_clear_mask | TIM_CCMR1_IC1F_CK_INT_N_4;
             break;
         case CK_INT_N_8:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-                                TIM_CCMR1_IC1F_CK_INT_N_8;
+            TIM_CCMR1(_timer) = ic1f_clear_mask | TIM_CCMR1_IC1F_CK_INT_N_8;
             break;
         case DTF_DIV_2_N_6:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-                                TIM_CCMR1_IC1F_DTF_DIV_2_N_6;
+            TIM_CCMR1(_timer) = ic1f_clear_mask | TIM_CCMR1_IC1F_DTF_DIV_2_N_6;
             break;
         case DTF_DIV_2_N_8:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-                                TIM_CCMR1_IC1F_DTF_DIV_2_N_8;
+            TIM_CCMR1(_timer) = ic1f_clear_mask | TIM_CCMR1_IC1F_DTF_DIV_2_N_8;
             break;
         case TF_DIV_4_N_6:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-                                TIM_CCMR1_IC1F_DTF_DIV_4_N_6;
+            TIM_CCMR1(_timer) = ic1f_clear_mask | TIM_CCMR1_IC1F_DTF_DIV_4_N_6;
             break;
         case DTF_DIV_4_N_8:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-                                TIM_CCMR1_IC1F_DTF_DIV_4_N_8;
+            TIM_CCMR1(_timer) = ic1f_clear_mask | TIM_CCMR1_IC1F_DTF_DIV_4_N_8;
             break;
         case DTF_DIV_8_N_6:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-                                TIM_CCMR1_IC1F_DTF_DIV_8_N_6;
+            TIM_CCMR1(_timer) = ic1f_clear_mask | TIM_CCMR1_IC1F_DTF_DIV_8_N_6;
             break;
         case DTF_DIV_8_N_8:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-                                TIM_CCMR1_IC1F_DTF_DIV_8_N_8;
+            TIM_CCMR1(_timer) = ic1f_clear_mask | TIM_CCMR1_IC1F_DTF_DIV_8_N_8;
             break;
         case DTF_DIV_16_N_5:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-                                TIM_CCMR1_IC1F_DTF_DIV_16_N_5;
+            TIM_CCMR1(_timer) = ic1f_clear_mask | TIM_CCMR1_IC1F_DTF_DIV_16_N_5;
             break;
         case DTF_DIV_16_N_6:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-                                TIM_CCMR1_IC1F_DTF_DIV_16_N_6;
+            TIM_CCMR1(_timer) = ic1f_clear_mask | TIM_CCMR1_IC1F_DTF_DIV_16_N_6;
             break;
         case DTF_DIV_16_N_8:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-                                TIM_CCMR1_IC1F_DTF_DIV_16_N_8;
+            TIM_CCMR1(_timer) = ic1f_clear_mask | TIM_CCMR1_IC1F_DTF_DIV_16_N_8;
             break;
         case DTF_DIV_32_N_5:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-                                TIM_CCMR1_IC1F_DTF_DIV_32_N_5;
+            TIM_CCMR1(_timer) = ic1f_clear_mask | TIM_CCMR1_IC1F_DTF_DIV_32_N_5;
             break;
         case DTF_DIV_32_N_6:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-                                TIM_CCMR1_IC1F_DTF_DIV_32_N_6;
+            TIM_CCMR1(_timer) = ic1f_clear_mask | TIM_CCMR1_IC1F_DTF_DIV_32_N_6;
             break;
         case DTF_DIV_32_N_8:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-                                TIM_CCMR1_IC1F_DTF_DIV_32_N_8;
+            TIM_CCMR1(_timer) = ic1f_clear_mask | TIM_CCMR1_IC1F_DTF_DIV_32_N_8;
             break;
     }
 
@@ -697,70 +670,57 @@ auto Timer::set_input_capture_2_filter(Filter filter) -> Result
         return USAGE_ERROR;
     }
 
+    const uint32_t ic2f_clear_mask =
+      TIM_CCMR1(_timer) & ~to_u32(TIM_CCMR1_IC2F_MASK);
+
     switch (filter) {
         case NO_FILTER:
-            TIM_CCMR1(_timer) =
-              (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) | TIM_CCMR1_IC2F_OFF;
+            TIM_CCMR1(_timer) = ic2f_clear_mask | TIM_CCMR1_IC2F_OFF;
             break;
         case CK_INT_N_2:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-                                TIM_CCMR1_IC2F_CK_INT_N_2;
+            TIM_CCMR1(_timer) = ic2f_clear_mask | TIM_CCMR1_IC2F_CK_INT_N_2;
             break;
         case CK_INT_N_4:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-                                TIM_CCMR1_IC2F_CK_INT_N_4;
+            TIM_CCMR1(_timer) = ic2f_clear_mask | TIM_CCMR1_IC2F_CK_INT_N_4;
             break;
         case CK_INT_N_8:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-                                TIM_CCMR1_IC2F_CK_INT_N_8;
+            TIM_CCMR1(_timer) = ic2f_clear_mask | TIM_CCMR1_IC2F_CK_INT_N_8;
             break;
         case DTF_DIV_2_N_6:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-                                TIM_CCMR1_IC2F_DTF_DIV_2_N_6;
+            TIM_CCMR1(_timer) = ic2f_clear_mask | TIM_CCMR1_IC2F_DTF_DIV_2_N_6;
             break;
         case DTF_DIV_2_N_8:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-                                TIM_CCMR1_IC2F_DTF_DIV_2_N_8;
+            TIM_CCMR1(_timer) = ic2f_clear_mask | TIM_CCMR1_IC2F_DTF_DIV_2_N_8;
             break;
         case TF_DIV_4_N_6:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-                                TIM_CCMR1_IC2F_DTF_DIV_4_N_6;
+            TIM_CCMR1(_timer) = ic2f_clear_mask | TIM_CCMR1_IC2F_DTF_DIV_4_N_6;
             break;
         case DTF_DIV_4_N_8:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-                                TIM_CCMR1_IC2F_DTF_DIV_4_N_8;
+            TIM_CCMR1(_timer) = ic2f_clear_mask | TIM_CCMR1_IC2F_DTF_DIV_4_N_8;
             break;
         case DTF_DIV_8_N_6:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-                                TIM_CCMR1_IC2F_DTF_DIV_8_N_6;
+            TIM_CCMR1(_timer) = ic2f_clear_mask | TIM_CCMR1_IC2F_DTF_DIV_8_N_6;
             break;
         case DTF_DIV_8_N_8:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-                                TIM_CCMR1_IC2F_DTF_DIV_8_N_8;
+            TIM_CCMR1(_timer) = ic2f_clear_mask | TIM_CCMR1_IC2F_DTF_DIV_8_N_8;
             break;
         case DTF_DIV_16_N_5:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-                                TIM_CCMR1_IC2F_DTF_DIV_16_N_5;
+            TIM_CCMR1(_timer) = ic2f_clear_mask | TIM_CCMR1_IC2F_DTF_DIV_16_N_5;
             break;
         case DTF_DIV_16_N_6:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-                                TIM_CCMR1_IC2F_DTF_DIV_16_N_6;
+            TIM_CCMR1(_timer) = ic2f_clear_mask | TIM_CCMR1_IC2F_DTF_DIV_16_N_6;
             break;
         case DTF_DIV_16_N_8:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-                                TIM_CCMR1_IC2F_DTF_DIV_16_N_8;
+            TIM_CCMR1(_timer) = ic2f_clear_mask | TIM_CCMR1_IC2F_DTF_DIV_16_N_8;
             break;
         case DTF_DIV_32_N_5:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-                                TIM_CCMR1_IC2F_DTF_DIV_32_N_5;
+            TIM_CCMR1(_timer) = ic2f_clear_mask | TIM_CCMR1_IC2F_DTF_DIV_32_N_5;
             break;
         case DTF_DIV_32_N_6:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-                                TIM_CCMR1_IC2F_DTF_DIV_32_N_6;
+            TIM_CCMR1(_timer) = ic2f_clear_mask | TIM_CCMR1_IC2F_DTF_DIV_32_N_6;
             break;
         case DTF_DIV_32_N_8:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-                                TIM_CCMR1_IC2F_DTF_DIV_32_N_8;
+            TIM_CCMR1(_timer) = ic2f_clear_mask | TIM_CCMR1_IC2F_DTF_DIV_32_N_8;
             break;
     }
 
@@ -789,7 +749,7 @@ auto Timer::disable_fast_output_compare_1() -> Result
         return USAGE_ERROR;
     }
 
-    TIM_CCMR1(_timer) &= ~TIM_CCMR1_OC1FE;
+    TIM_CCMR1(_timer) &= ~to_u32(TIM_CCMR1_OC1FE);
     return OK;
 }
 
@@ -815,7 +775,7 @@ auto Timer::disable_fast_output_compare_2() -> Result
         return USAGE_ERROR;
     }
 
-    TIM_CCMR1(_timer) &= ~TIM_CCMR1_OC2FE;
+    TIM_CCMR1(_timer) &= ~to_u32(TIM_CCMR1_OC2FE);
     return OK;
 }
 
@@ -841,7 +801,7 @@ auto Timer::disable_output_compare_1_preload() -> Result
         return USAGE_ERROR;
     }
 
-    TIM_CCMR1(_timer) &= ~TIM_CCMR1_OC1PE;
+    TIM_CCMR1(_timer) &= ~to_u32(TIM_CCMR1_OC1PE);
     return OK;
 }
 
@@ -868,7 +828,7 @@ auto Timer::disable_output_compare_2_preload() -> Result
         return USAGE_ERROR;
     }
 
-    TIM_CCMR1(_timer) &= ~TIM_CCMR1_OC2PE;
+    TIM_CCMR1(_timer) &= ~to_u32(TIM_CCMR1_OC2PE);
     return OK;
 }
 
@@ -881,38 +841,33 @@ auto Timer::set_output_compare_1_mode(OcMode mode) -> Result
         return USAGE_ERROR;
     }
 
+    const uint32_t oc1m_clear_mask =
+      TIM_CCMR1(_timer) & ~to_u32(TIM_CCMR1_OC1M_MASK);
+
     switch (mode) {
         case FROZEN:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC1M_MASK) |
-                                TIM_CCMR1_OC1M_FROZEN;
+            TIM_CCMR1(_timer) = oc1m_clear_mask | TIM_CCMR1_OC1M_FROZEN;
             break;
         case ACTIVE_LEVEL_ON_MATCH:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC1M_MASK) |
-                                TIM_CCMR1_OC1M_ACTIVE;
+            TIM_CCMR1(_timer) = oc1m_clear_mask | TIM_CCMR1_OC1M_ACTIVE;
             break;
         case INACTIVE_LEVEL_ON_MATCH:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC1M_MASK) |
-                                TIM_CCMR1_OC1M_INACTIVE;
+            TIM_CCMR1(_timer) = oc1m_clear_mask | TIM_CCMR1_OC1M_INACTIVE;
             break;
         case TOGGLE:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC1M_MASK) |
-                                TIM_CCMR1_OC1M_TOGGLE;
+            TIM_CCMR1(_timer) = oc1m_clear_mask | TIM_CCMR1_OC1M_TOGGLE;
             break;
         case FORCE_INACTIVE_LEVEL:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC1M_MASK) |
-                                TIM_CCMR1_OC1M_FORCE_LOW;
+            TIM_CCMR1(_timer) = oc1m_clear_mask | TIM_CCMR1_OC1M_FORCE_LOW;
             break;
         case FORCE_ACTIVE_LEVEL:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC1M_MASK) |
-                                TIM_CCMR1_OC1M_FORCE_HIGH;
+            TIM_CCMR1(_timer) = oc1m_clear_mask | TIM_CCMR1_OC1M_FORCE_HIGH;
             break;
         case PWM_MODE_1:
-            TIM_CCMR1(_timer) =
-              (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC1M_MASK) | TIM_CCMR1_OC1M_PWM1;
+            TIM_CCMR1(_timer) = oc1m_clear_mask | TIM_CCMR1_OC1M_PWM1;
             break;
         case PWM_MODE_2:
-            TIM_CCMR1(_timer) =
-              (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC1M_MASK) | TIM_CCMR1_OC1M_PWM2;
+            TIM_CCMR1(_timer) = oc1m_clear_mask | TIM_CCMR1_OC1M_PWM2;
             break;
     }
 
@@ -928,38 +883,33 @@ auto Timer::set_output_compare_2_mode(OcMode mode) -> Result
         return USAGE_ERROR;
     }
 
+    const uint32_t oc2m_clear_mask =
+      TIM_CCMR1(_timer) & ~to_u32(TIM_CCMR1_OC2M_MASK);
+
     switch (mode) {
         case FROZEN:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC2M_MASK) |
-                                TIM_CCMR1_OC2M_FROZEN;
+            TIM_CCMR1(_timer) = oc2m_clear_mask | TIM_CCMR1_OC2M_FROZEN;
             break;
         case ACTIVE_LEVEL_ON_MATCH:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC2M_MASK) |
-                                TIM_CCMR1_OC2M_ACTIVE;
+            TIM_CCMR1(_timer) = oc2m_clear_mask | TIM_CCMR1_OC2M_ACTIVE;
             break;
         case INACTIVE_LEVEL_ON_MATCH:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC2M_MASK) |
-                                TIM_CCMR1_OC2M_INACTIVE;
+            TIM_CCMR1(_timer) = oc2m_clear_mask | TIM_CCMR1_OC2M_INACTIVE;
             break;
         case TOGGLE:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC2M_MASK) |
-                                TIM_CCMR1_OC2M_TOGGLE;
+            TIM_CCMR1(_timer) = oc2m_clear_mask | TIM_CCMR1_OC2M_TOGGLE;
             break;
         case FORCE_INACTIVE_LEVEL:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC2M_MASK) |
-                                TIM_CCMR1_OC2M_FORCE_LOW;
+            TIM_CCMR1(_timer) = oc2m_clear_mask | TIM_CCMR1_OC2M_FORCE_LOW;
             break;
         case FORCE_ACTIVE_LEVEL:
-            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC2M_MASK) |
-                                TIM_CCMR1_OC2M_FORCE_HIGH;
+            TIM_CCMR1(_timer) = oc2m_clear_mask | TIM_CCMR1_OC2M_FORCE_HIGH;
             break;
         case PWM_MODE_1:
-            TIM_CCMR1(_timer) =
-              (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC2M_MASK) | TIM_CCMR1_OC2M_PWM1;
+            TIM_CCMR1(_timer) = oc2m_clear_mask | TIM_CCMR1_OC2M_PWM1;
             break;
         case PWM_MODE_2:
-            TIM_CCMR1(_timer) =
-              (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC2M_MASK) | TIM_CCMR1_OC2M_PWM2;
+            TIM_CCMR1(_timer) = oc2m_clear_mask | TIM_CCMR1_OC2M_PWM2;
             break;
     }
 
@@ -975,22 +925,21 @@ auto Timer::set_capture_compare_3_mode(CcMode mode) -> Result
         return USAGE_ERROR;
     }
 
+    const uint32_t oc3s_clear_mask =
+      TIM_CCMR2(_timer) & ~to_u32(TIM_CCMR2_CC3S_MASK);
+
     switch (mode) {
         case OUTPUT:
-            TIM_CCMR2(_timer) =
-              (TIM_CCMR2(_timer) & ~TIM_CCMR2_CC3S_MASK) | TIM_CCMR2_CC3S_OUT;
+            TIM_CCMR2(_timer) = oc3s_clear_mask | TIM_CCMR2_CC3S_OUT;
             break;
         case INPUT_MAPPED_TI3:
-            TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_CC3S_MASK) |
-                                TIM_CCMR2_CC3S_IN_TI3;
+            TIM_CCMR2(_timer) = oc3s_clear_mask | TIM_CCMR2_CC3S_IN_TI3;
             break;
         case INPUT_MAPPED_TI4:
-            TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_CC3S_MASK) |
-                                TIM_CCMR2_CC3S_IN_TI4;
+            TIM_CCMR2(_timer) = oc3s_clear_mask | TIM_CCMR2_CC3S_IN_TI4;
             break;
         case INPUT_MAPPED_TRC:
-            TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_CC3S_MASK) |
-                                TIM_CCMR2_CC3S_IN_TRC;
+            TIM_CCMR2(_timer) = oc3s_clear_mask | TIM_CCMR2_CC3S_IN_TRC;
             break;
 
         case INPUT_MAPPED_TI1:
@@ -1010,22 +959,21 @@ auto Timer::set_capture_compare_4_mode(CcMode mode) -> Result
         return USAGE_ERROR;
     }
 
+    const uint32_t oc4s_clear_mask =
+      TIM_CCMR2(_timer) & ~to_u32(TIM_CCMR2_CC4S_MASK);
+
     switch (mode) {
         case OUTPUT:
-            TIM_CCMR2(_timer) =
-              (TIM_CCMR2(_timer) & ~TIM_CCMR2_CC4S_MASK) | TIM_CCMR2_CC4S_OUT;
+            TIM_CCMR2(_timer) = oc4s_clear_mask | TIM_CCMR2_CC4S_OUT;
             break;
         case INPUT_MAPPED_TI3:
-            TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_CC4S_MASK) |
-                                TIM_CCMR2_CC4S_IN_TI3;
+            TIM_CCMR2(_timer) = oc4s_clear_mask | TIM_CCMR2_CC4S_IN_TI3;
             break;
         case INPUT_MAPPED_TI4:
-            TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_CC4S_MASK) |
-                                TIM_CCMR2_CC4S_IN_TI4;
+            TIM_CCMR2(_timer) = oc4s_clear_mask | TIM_CCMR2_CC4S_IN_TI4;
             break;
         case INPUT_MAPPED_TRC:
-            TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_CC4S_MASK) |
-                                TIM_CCMR2_CC4S_IN_TRC;
+            TIM_CCMR2(_timer) = oc4s_clear_mask | TIM_CCMR2_CC4S_IN_TRC;
             break;
 
         case INPUT_MAPPED_TI1:
@@ -1045,22 +993,21 @@ auto Timer::set_input_capture_3_prescaler(Prescaler prescaler) -> Result
         return USAGE_ERROR;
     }
 
+    const uint32_t ic3psc_clear_mask =
+      TIM_CCMR2(_timer) & ~to_u32(TIM_CCMR2_IC3PSC_MASK);
+
     switch (prescaler) {
         case NO_PRESCALER:
-            TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_IC3PSC_MASK) |
-                                TIM_CCMR2_IC3PSC_OFF;
+            TIM_CCMR2(_timer) = ic3psc_clear_mask | TIM_CCMR2_IC3PSC_OFF;
             break;
         case CAPTURE_EVERY_2_EVENTS:
-            TIM_CCMR2(_timer) =
-              (TIM_CCMR2(_timer) & ~TIM_CCMR2_IC3PSC_MASK) | TIM_CCMR2_IC3PSC_2;
+            TIM_CCMR2(_timer) = ic3psc_clear_mask | TIM_CCMR2_IC3PSC_2;
             break;
         case CAPTURE_EVERY_4_EVENTS:
-            TIM_CCMR2(_timer) =
-              (TIM_CCMR2(_timer) & ~TIM_CCMR2_IC3PSC_MASK) | TIM_CCMR2_IC3PSC_4;
+            TIM_CCMR2(_timer) = ic3psc_clear_mask | TIM_CCMR2_IC3PSC_4;
             break;
         case CAPTURE_EVERY_8_EVENTS:
-            TIM_CCMR2(_timer) =
-              (TIM_CCMR2(_timer) & ~TIM_CCMR2_IC3PSC_MASK) | TIM_CCMR2_IC3PSC_8;
+            TIM_CCMR2(_timer) = ic3psc_clear_mask | TIM_CCMR2_IC3PSC_8;
             break;
     }
 
@@ -1076,22 +1023,21 @@ auto Timer::set_input_capture_4_prescaler(Prescaler prescaler) -> Result
         return USAGE_ERROR;
     }
 
+    const uint32_t ic4psc_clear_mask =
+      TIM_CCMR2(_timer) & ~to_u32(TIM_CCMR2_IC4PSC_MASK);
+
     switch (prescaler) {
         case NO_PRESCALER:
-            TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_IC4PSC_MASK) |
-                                TIM_CCMR2_IC4PSC_OFF;
+            TIM_CCMR2(_timer) = ic4psc_clear_mask | TIM_CCMR2_IC4PSC_OFF;
             break;
         case CAPTURE_EVERY_2_EVENTS:
-            TIM_CCMR2(_timer) =
-              (TIM_CCMR2(_timer) & ~TIM_CCMR2_IC4PSC_MASK) | TIM_CCMR2_IC4PSC_2;
+            TIM_CCMR2(_timer) = ic4psc_clear_mask | TIM_CCMR2_IC4PSC_2;
             break;
         case CAPTURE_EVERY_4_EVENTS:
-            TIM_CCMR2(_timer) =
-              (TIM_CCMR2(_timer) & ~TIM_CCMR2_IC4PSC_MASK) | TIM_CCMR2_IC4PSC_4;
+            TIM_CCMR2(_timer) = ic4psc_clear_mask | TIM_CCMR2_IC4PSC_4;
             break;
         case CAPTURE_EVERY_8_EVENTS:
-            TIM_CCMR2(_timer) =
-              (TIM_CCMR2(_timer) & ~TIM_CCMR2_IC4PSC_MASK) | TIM_CCMR2_IC4PSC_8;
+            TIM_CCMR2(_timer) = ic4psc_clear_mask | TIM_CCMR2_IC4PSC_8;
             break;
     }
 
@@ -1107,70 +1053,57 @@ auto Timer::set_input_capture_3_filter(Filter filter) -> Result
         return USAGE_ERROR;
     }
 
+    const uint32_t ic3f_clear_mask =
+      TIM_CCMR2(_timer) & ~to_u32(TIM_CCMR2_IC3F_MASK);
+
     switch (filter) {
         case NO_FILTER:
-            TIM_CCMR2(_timer) =
-              (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) | TIM_CCMR2_IC3F_OFF;
+            TIM_CCMR2(_timer) = ic3f_clear_mask | TIM_CCMR2_IC3F_OFF;
             break;
         case CK_INT_N_2:
-            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-                                TIM_CCMR2_IC3F_CK_INT_N_2;
+            TIM_CCMR2(_timer) = ic3f_clear_mask | TIM_CCMR2_IC3F_CK_INT_N_2;
             break;
         case CK_INT_N_4:
-            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-                                TIM_CCMR2_IC3F_CK_INT_N_4;
+            TIM_CCMR2(_timer) = ic3f_clear_mask | TIM_CCMR2_IC3F_CK_INT_N_4;
             break;
         case CK_INT_N_8:
-            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-                                TIM_CCMR2_IC3F_CK_INT_N_8;
+            TIM_CCMR2(_timer) = ic3f_clear_mask | TIM_CCMR2_IC3F_CK_INT_N_8;
             break;
         case DTF_DIV_2_N_6:
-            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-                                TIM_CCMR2_IC3F_DTF_DIV_2_N_6;
+            TIM_CCMR2(_timer) = ic3f_clear_mask | TIM_CCMR2_IC3F_DTF_DIV_2_N_6;
             break;
         case DTF_DIV_2_N_8:
-            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-                                TIM_CCMR2_IC3F_DTF_DIV_2_N_8;
+            TIM_CCMR2(_timer) = ic3f_clear_mask | TIM_CCMR2_IC3F_DTF_DIV_2_N_8;
             break;
         case TF_DIV_4_N_6:
-            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-                                TIM_CCMR2_IC3F_DTF_DIV_4_N_6;
+            TIM_CCMR2(_timer) = ic3f_clear_mask | TIM_CCMR2_IC3F_DTF_DIV_4_N_6;
             break;
         case DTF_DIV_4_N_8:
-            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-                                TIM_CCMR2_IC3F_DTF_DIV_4_N_8;
+            TIM_CCMR2(_timer) = ic3f_clear_mask | TIM_CCMR2_IC3F_DTF_DIV_4_N_8;
             break;
         case DTF_DIV_8_N_6:
-            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-                                TIM_CCMR2_IC3F_DTF_DIV_8_N_6;
+            TIM_CCMR2(_timer) = ic3f_clear_mask | TIM_CCMR2_IC3F_DTF_DIV_8_N_6;
             break;
         case DTF_DIV_8_N_8:
-            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-                                TIM_CCMR2_IC3F_DTF_DIV_8_N_8;
+            TIM_CCMR2(_timer) = ic3f_clear_mask | TIM_CCMR2_IC3F_DTF_DIV_8_N_8;
             break;
         case DTF_DIV_16_N_5:
-            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-                                TIM_CCMR2_IC3F_DTF_DIV_16_N_5;
+            TIM_CCMR2(_timer) = ic3f_clear_mask | TIM_CCMR2_IC3F_DTF_DIV_16_N_5;
             break;
         case DTF_DIV_16_N_6:
-            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-                                TIM_CCMR2_IC3F_DTF_DIV_16_N_6;
+            TIM_CCMR2(_timer) = ic3f_clear_mask | TIM_CCMR2_IC3F_DTF_DIV_16_N_6;
             break;
         case DTF_DIV_16_N_8:
-            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-                                TIM_CCMR2_IC3F_DTF_DIV_16_N_8;
+            TIM_CCMR2(_timer) = ic3f_clear_mask | TIM_CCMR2_IC3F_DTF_DIV_16_N_8;
             break;
         case DTF_DIV_32_N_5:
-            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-                                TIM_CCMR2_IC3F_DTF_DIV_32_N_5;
+            TIM_CCMR2(_timer) = ic3f_clear_mask | TIM_CCMR2_IC3F_DTF_DIV_32_N_5;
             break;
         case DTF_DIV_32_N_6:
-            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-                                TIM_CCMR2_IC3F_DTF_DIV_32_N_6;
+            TIM_CCMR2(_timer) = ic3f_clear_mask | TIM_CCMR2_IC3F_DTF_DIV_32_N_6;
             break;
         case DTF_DIV_32_N_8:
-            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-                                TIM_CCMR2_IC3F_DTF_DIV_32_N_8;
+            TIM_CCMR2(_timer) = ic3f_clear_mask | TIM_CCMR2_IC3F_DTF_DIV_32_N_8;
             break;
     }
 
@@ -1186,70 +1119,57 @@ auto Timer::set_input_capture_4_filter(Filter filter) -> Result
         return USAGE_ERROR;
     }
 
+    const uint32_t ic4f_clear_mask =
+      TIM_CCMR2(_timer) & ~to_u32(TIM_CCMR2_IC4F_MASK);
+
     switch (filter) {
         case NO_FILTER:
-            TIM_CCMR2(_timer) =
-              (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) | TIM_CCMR2_IC4F_OFF;
+            TIM_CCMR2(_timer) = ic4f_clear_mask | TIM_CCMR2_IC4F_OFF;
             break;
         case CK_INT_N_2:
-            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-                                TIM_CCMR2_IC4F_CK_INT_N_2;
+            TIM_CCMR2(_timer) = ic4f_clear_mask | TIM_CCMR2_IC4F_CK_INT_N_2;
             break;
         case CK_INT_N_4:
-            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-                                TIM_CCMR2_IC4F_CK_INT_N_4;
+            TIM_CCMR2(_timer) = ic4f_clear_mask | TIM_CCMR2_IC4F_CK_INT_N_4;
             break;
         case CK_INT_N_8:
-            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-                                TIM_CCMR2_IC4F_CK_INT_N_8;
+            TIM_CCMR2(_timer) = ic4f_clear_mask | TIM_CCMR2_IC4F_CK_INT_N_8;
             break;
         case DTF_DIV_2_N_6:
-            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-                                TIM_CCMR2_IC4F_DTF_DIV_2_N_6;
+            TIM_CCMR2(_timer) = ic4f_clear_mask | TIM_CCMR2_IC4F_DTF_DIV_2_N_6;
             break;
         case DTF_DIV_2_N_8:
-            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-                                TIM_CCMR2_IC4F_DTF_DIV_2_N_8;
+            TIM_CCMR2(_timer) = ic4f_clear_mask | TIM_CCMR2_IC4F_DTF_DIV_2_N_8;
             break;
         case TF_DIV_4_N_6:
-            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-                                TIM_CCMR2_IC4F_DTF_DIV_4_N_6;
+            TIM_CCMR2(_timer) = ic4f_clear_mask | TIM_CCMR2_IC4F_DTF_DIV_4_N_6;
             break;
         case DTF_DIV_4_N_8:
-            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-                                TIM_CCMR2_IC4F_DTF_DIV_4_N_8;
+            TIM_CCMR2(_timer) = ic4f_clear_mask | TIM_CCMR2_IC4F_DTF_DIV_4_N_8;
             break;
         case DTF_DIV_8_N_6:
-            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-                                TIM_CCMR2_IC4F_DTF_DIV_8_N_6;
+            TIM_CCMR2(_timer) = ic4f_clear_mask | TIM_CCMR2_IC4F_DTF_DIV_8_N_6;
             break;
         case DTF_DIV_8_N_8:
-            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-                                TIM_CCMR2_IC4F_DTF_DIV_8_N_8;
+            TIM_CCMR2(_timer) = ic4f_clear_mask | TIM_CCMR2_IC4F_DTF_DIV_8_N_8;
             break;
         case DTF_DIV_16_N_5:
-            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-                                TIM_CCMR2_IC4F_DTF_DIV_16_N_5;
+            TIM_CCMR2(_timer) = ic4f_clear_mask | TIM_CCMR2_IC4F_DTF_DIV_16_N_5;
             break;
         case DTF_DIV_16_N_6:
-            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-                                TIM_CCMR2_IC4F_DTF_DIV_16_N_6;
+            TIM_CCMR2(_timer) = ic4f_clear_mask | TIM_CCMR2_IC4F_DTF_DIV_16_N_6;
             break;
         case DTF_DIV_16_N_8:
-            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-                                TIM_CCMR2_IC4F_DTF_DIV_16_N_8;
+            TIM_CCMR2(_timer) = ic4f_clear_mask | TIM_CCMR2_IC4F_DTF_DIV_16_N_8;
             break;
         case DTF_DIV_32_N_5:
-            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-                                TIM_CCMR2_IC4F_DTF_DIV_32_N_5;
+            TIM_CCMR2(_timer) = ic4f_clear_mask | TIM_CCMR2_IC4F_DTF_DIV_32_N_5;
             break;
         case DTF_DIV_32_N_6:
-            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-                                TIM_CCMR2_IC4F_DTF_DIV_32_N_6;
+            TIM_CCMR2(_timer) = ic4f_clear_mask | TIM_CCMR2_IC4F_DTF_DIV_32_N_6;
             break;
         case DTF_DIV_32_N_8:
-            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-                                TIM_CCMR2_IC4F_DTF_DIV_32_N_8;
+            TIM_CCMR2(_timer) = ic4f_clear_mask | TIM_CCMR2_IC4F_DTF_DIV_32_N_8;
             break;
     }
 
@@ -1277,7 +1197,7 @@ auto Timer::disable_fast_output_compare_3() -> Result
         return USAGE_ERROR;
     }
 
-    TIM_CCMR2(_timer) &= ~TIM_CCMR2_OC3FE;
+    TIM_CCMR2(_timer) &= ~to_u32(TIM_CCMR2_OC3FE);
     return OK;
 }
 
@@ -1303,7 +1223,7 @@ auto Timer::disable_fast_output_compare_4() -> Result
         return USAGE_ERROR;
     }
 
-    TIM_CCMR2(_timer) &= ~TIM_CCMR2_OC4FE;
+    TIM_CCMR2(_timer) &= ~to_u32(TIM_CCMR2_OC4FE);
     return OK;
 }
 
@@ -1329,7 +1249,7 @@ auto Timer::disable_output_compare_3_preload() -> Result
         return USAGE_ERROR;
     }
 
-    TIM_CCMR2(_timer) &= ~TIM_CCMR2_OC3PE;
+    TIM_CCMR2(_timer) &= ~to_u32(TIM_CCMR2_OC3PE);
     return OK;
 }
 
@@ -1355,7 +1275,7 @@ auto Timer::disable_output_compare_4_preload() -> Result
         return USAGE_ERROR;
     }
 
-    TIM_CCMR2(_timer) &= ~TIM_CCMR2_OC4PE;
+    TIM_CCMR2(_timer) &= ~to_u32(TIM_CCMR2_OC4PE);
     return OK;
 }
 
@@ -1368,38 +1288,33 @@ auto Timer::set_output_compare_3_mode(OcMode mode) -> Result
         return USAGE_ERROR;
     }
 
+    const uint32_t oc3m_clear_mask =
+      TIM_CCMR2(_timer) & ~to_u32(TIM_CCMR2_OC3M_FROZEN);
+
     switch (mode) {
         case FROZEN:
-            TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC3M_MASK) |
-                                TIM_CCMR2_OC3M_FROZEN;
+            TIM_CCMR2(_timer) = oc3m_clear_mask | TIM_CCMR2_OC3M_FROZEN;
             break;
         case ACTIVE_LEVEL_ON_MATCH:
-            TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC3M_MASK) |
-                                TIM_CCMR2_OC3M_ACTIVE;
+            TIM_CCMR2(_timer) = oc3m_clear_mask | TIM_CCMR2_OC3M_ACTIVE;
             break;
         case INACTIVE_LEVEL_ON_MATCH:
-            TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC3M_MASK) |
-                                TIM_CCMR2_OC3M_INACTIVE;
+            TIM_CCMR2(_timer) = oc3m_clear_mask | TIM_CCMR2_OC3M_INACTIVE;
             break;
         case TOGGLE:
-            TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC3M_MASK) |
-                                TIM_CCMR2_OC3M_TOGGLE;
+            TIM_CCMR2(_timer) = oc3m_clear_mask | TIM_CCMR2_OC3M_TOGGLE;
             break;
         case FORCE_INACTIVE_LEVEL:
-            TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC3M_MASK) |
-                                TIM_CCMR2_OC3M_FORCE_LOW;
+            TIM_CCMR2(_timer) = oc3m_clear_mask | TIM_CCMR2_OC3M_FORCE_LOW;
             break;
         case FORCE_ACTIVE_LEVEL:
-            TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC3M_MASK) |
-                                TIM_CCMR2_OC3M_FORCE_HIGH;
+            TIM_CCMR2(_timer) = oc3m_clear_mask | TIM_CCMR2_OC3M_FORCE_HIGH;
             break;
         case PWM_MODE_1:
-            TIM_CCMR2(_timer) =
-              (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC3M_MASK) | TIM_CCMR2_OC3M_PWM1;
+            TIM_CCMR2(_timer) = oc3m_clear_mask | TIM_CCMR2_OC3M_PWM1;
             break;
         case PWM_MODE_2:
-            TIM_CCMR2(_timer) =
-              (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC3M_MASK) | TIM_CCMR2_OC3M_PWM2;
+            TIM_CCMR2(_timer) = oc3m_clear_mask | TIM_CCMR2_OC3M_PWM2;
             break;
     }
 
@@ -1415,38 +1330,33 @@ auto Timer::set_output_compare_4_mode(OcMode mode) -> Result
         return USAGE_ERROR;
     }
 
+    const uint32_t oc4m_clear_mask =
+      TIM_CCMR2(_timer) & ~to_u32(TIM_CCMR2_OC4M_MASK);
+
     switch (mode) {
         case FROZEN:
-            TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC4M_MASK) |
-                                TIM_CCMR2_OC4M_FROZEN;
+            TIM_CCMR2(_timer) = oc4m_clear_mask | TIM_CCMR2_OC4M_FROZEN;
             break;
         case ACTIVE_LEVEL_ON_MATCH:
-            TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC4M_MASK) |
-                                TIM_CCMR2_OC4M_ACTIVE;
+            TIM_CCMR2(_timer) = oc4m_clear_mask | TIM_CCMR2_OC4M_ACTIVE;
             break;
         case INACTIVE_LEVEL_ON_MATCH:
-            TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC4M_MASK) |
-                                TIM_CCMR2_OC4M_INACTIVE;
+            TIM_CCMR2(_timer) = oc4m_clear_mask | TIM_CCMR2_OC4M_INACTIVE;
             break;
         case TOGGLE:
-            TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC4M_MASK) |
-                                TIM_CCMR2_OC4M_TOGGLE;
+            TIM_CCMR2(_timer) = oc4m_clear_mask | TIM_CCMR2_OC4M_TOGGLE;
             break;
         case FORCE_INACTIVE_LEVEL:
-            TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC4M_MASK) |
-                                TIM_CCMR2_OC4M_FORCE_LOW;
+            TIM_CCMR2(_timer) = oc4m_clear_mask | TIM_CCMR2_OC4M_FORCE_LOW;
             break;
         case FORCE_ACTIVE_LEVEL:
-            TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC4M_MASK) |
-                                TIM_CCMR2_OC4M_FORCE_HIGH;
+            TIM_CCMR2(_timer) = oc4m_clear_mask | TIM_CCMR2_OC4M_FORCE_HIGH;
             break;
         case PWM_MODE_1:
-            TIM_CCMR2(_timer) =
-              (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC4M_MASK) | TIM_CCMR2_OC4M_PWM1;
+            TIM_CCMR2(_timer) = oc4m_clear_mask | TIM_CCMR2_OC4M_PWM1;
             break;
         case PWM_MODE_2:
-            TIM_CCMR2(_timer) =
-              (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC4M_MASK) | TIM_CCMR2_OC4M_PWM2;
+            TIM_CCMR2(_timer) = oc4m_clear_mask | TIM_CCMR2_OC4M_PWM2;
             break;
     }
 
@@ -1463,7 +1373,7 @@ auto Timer::enable_capture_compare_1() -> Result
 // 9,12
 auto Timer::disable_capture_compare_1() -> Result
 {
-    TIM_CCER(_timer) &= ~TIM_CCER_CC1E;
+    TIM_CCER(_timer) &= ~to_u32(TIM_CCER_CC1E);
     return OK;
 }
 
@@ -1475,7 +1385,7 @@ auto Timer::set_capture_compare_1_polarity(Polarity polarity) -> Result
             TIM_CCER(_timer) |= TIM_CCER_CC1P;
             break;
         case HI_RISING_EDGE:
-            TIM_CCER(_timer) &= ~TIM_CCER_CC1P;
+            TIM_CCER(_timer) &= ~to_u32(TIM_CCER_CC1P);
             break;
     }
 
@@ -1489,7 +1399,7 @@ auto Timer::set_capture_compare_1_com_polarity(Polarity polarity) -> Result
             TIM_CCER(_timer) |= TIM_CCER_CC1NP;
             break;
         case HI_RISING_EDGE:
-            TIM_CCER(_timer) &= ~TIM_CCER_CC1NP;
+            TIM_CCER(_timer) &= ~to_u32(TIM_CCER_CC1NP);
             break;
     }
 
@@ -1506,7 +1416,7 @@ auto Timer::enable_capture_compare_2() -> Result
 // 9,12
 auto Timer::disable_capture_compare_2() -> Result
 {
-    TIM_CCER(_timer) &= ~TIM_CCER_CC2E;
+    TIM_CCER(_timer) &= ~to_u32(TIM_CCER_CC2E);
     return OK;
 }
 
@@ -1518,7 +1428,7 @@ auto Timer::set_capture_compare_2_polarity(Polarity polarity) -> Result
             TIM_CCER(_timer) |= TIM_CCER_CC2P;
             break;
         case HI_RISING_EDGE:
-            TIM_CCER(_timer) &= ~TIM_CCER_CC2P;
+            TIM_CCER(_timer) &= ~to_u32(TIM_CCER_CC2P);
             break;
     }
 
@@ -1534,7 +1444,7 @@ auto Timer::enable_capture_compare_3() -> Result
 // 9,12
 auto Timer::disable_capture_compare_3() -> Result
 {
-    TIM_CCER(_timer) &= ~TIM_CCER_CC3E;
+    TIM_CCER(_timer) &= ~to_u32(TIM_CCER_CC3E);
     return OK;
 }
 
@@ -1546,7 +1456,7 @@ auto Timer::set_capture_compare_3_polarity(Polarity polarity) -> Result
             TIM_CCER(_timer) |= TIM_CCER_CC3P;
             break;
         case HI_RISING_EDGE:
-            TIM_CCER(_timer) &= ~TIM_CCER_CC3P;
+            TIM_CCER(_timer) &= ~to_u32(TIM_CCER_CC3P);
             break;
     }
 
@@ -1560,7 +1470,7 @@ auto Timer::set_capture_compare_3_com_polarity(Polarity polarity) -> Result
             TIM_CCER(_timer) |= TIM_CCER_CC3NP;
             break;
         case HI_RISING_EDGE:
-            TIM_CCER(_timer) &= ~TIM_CCER_CC3NP;
+            TIM_CCER(_timer) &= ~to_u32(TIM_CCER_CC3NP);
             break;
     }
 
@@ -1577,7 +1487,7 @@ auto Timer::enable_capture_compare_4() -> Result
 // 9,12
 auto Timer::disable_capture_compare_4() -> Result
 {
-    TIM_CCER(_timer) &= ~TIM_CCER_CC4E;
+    TIM_CCER(_timer) &= ~to_u32(TIM_CCER_CC4E);
     return OK;
 }
 
@@ -1589,7 +1499,7 @@ auto Timer::set_capture_compare_4_polarity(Polarity polarity) -> Result
             TIM_CCER(_timer) |= TIM_CCER_CC4P;
             break;
         case HI_RISING_EDGE:
-            TIM_CCER(_timer) &= ~TIM_CCER_CC4P;
+            TIM_CCER(_timer) &= ~to_u32(TIM_CCER_CC4P);
             break;
     }
 
@@ -1600,10 +1510,10 @@ auto Timer::set_capture_compare_4_com_polarity(Polarity polarity) -> Result
 {
     switch (polarity) {
         case LO_FALLING_EDGE:
-            TIM_CCER(_timer) |= (1 << 15);
+            TIM_CCER(_timer) |= to_u32(1 << 15);
             break;
         case HI_RISING_EDGE:
-            TIM_CCER(_timer) &= ~(1 << 15);
+            TIM_CCER(_timer) &= ~to_u32(1 << 15);
             break;
     }
 
@@ -1613,7 +1523,7 @@ auto Timer::set_capture_compare_4_com_polarity(Polarity polarity) -> Result
 // 9,12
 uint16_t Timer::get_counter_value() const
 {
-    return TIM_CNT(_timer);
+    return static_cast<uint16_t>(TIM_CNT(_timer));
 }
 
 uint32_t Timer::get_counter_value32() const
@@ -1630,7 +1540,7 @@ void Timer::set_counter_value(uint16_t value)
 // 9,12
 uint16_t Timer::get_prescaler_value() const
 {
-    return TIM_PSC(_timer);
+    return static_cast<uint16_t>(TIM_PSC(_timer));
 }
 
 // 9,12
@@ -1642,7 +1552,7 @@ void Timer::set_prescaler_value(uint32_t value)
 // 9,12
 uint16_t Timer::get_autoreload_value() const
 {
-    return TIM_ARR(_timer);
+    return static_cast<uint16_t>(TIM_ARR(_timer));
 }
 
 // 9,12
@@ -1654,7 +1564,7 @@ void Timer::set_autoreload_value(uint32_t value)
 // 9,12
 uint16_t Timer::get_capture_compare_1_value() const
 {
-    return TIM_CCR1(_timer);
+    return static_cast<uint16_t>(TIM_CCR1(_timer));
 }
 
 // 9,12
@@ -1666,7 +1576,7 @@ void Timer::set_capture_compare_1_value(uint32_t value)
 // 9,12
 uint16_t Timer::get_capture_compare_2_value() const
 {
-    return TIM_CCR2(_timer);
+    return static_cast<uint16_t>(TIM_CCR2(_timer));
 }
 
 // 9,12
@@ -1677,7 +1587,7 @@ void Timer::set_capture_compare_2_value(uint32_t value)
 
 uint16_t Timer::get_capture_compare_3_value() const
 {
-    return TIM_CCR3(_timer);
+    return static_cast<uint16_t>(TIM_CCR3(_timer));
 }
 
 // 9,12
@@ -1689,7 +1599,7 @@ void Timer::set_capture_compare_3_value(uint32_t value)
 // 9,12
 uint16_t Timer::get_capture_compare_4_value() const
 {
-    return TIM_CCR4(_timer);
+    return static_cast<uint16_t>(TIM_CCR4(_timer));
 }
 
 // 9,12
@@ -1705,7 +1615,7 @@ void Timer::enable_etr_clock()
 
 void Timer::disable_etr_clock()
 {
-    TIM_SMCR(_timer) &= ~TIM_SMCR_ECE;  // reset enable bit
+    TIM_SMCR(_timer) &= ~to_u32(TIM_SMCR_ECE);  // reset enable bit
 }
 
 void Timer::set_etr_filter(ExtTriggerFilter filter)
diff --git a/cm3cpp/usart.hpp b/cm3cpp/usart.hpp
index 4676490..6ee5ff0 100644
--- a/cm3cpp/usart.hpp
+++ b/cm3cpp/usart.hpp
@@ -146,7 +146,9 @@ class Usart
                 usart_get_flag(_usart, USART_SR_TC));
     }
 
-    void clear_tc_flag() { USART_SR(_usart) = ~USART_SR_TC; }
+    void clear_tc_flag() {
+        USART_SR(_usart) = ~static_cast<uint32_t>(USART_SR_TC);
+    }
 
     void enable_irq() { nvic_enable_irq(_usart_nvic); }
 
@@ -162,7 +164,9 @@ class Usart
 
     void disable_tx_interrupt() { usart_disable_tx_interrupt(_usart); }
 
-    void disable_tc_interrupt() { USART_CR1(_usart) &= ~USART_CR1_TCIE; }
+    void disable_tc_interrupt() {
+        USART_CR1(_usart) &= ~static_cast<uint32_t>(USART_CR1_TCIE);
+    }
 
     bool is_framing_error() { return (USART_SR(_usart) & USART_SR_FE) != 0; }
 
@@ -196,7 +200,7 @@ class Usart
     Gpio _rx;
     Gpio _tx;
     uint32_t _usart;
-    uint32_t _usart_nvic;
+    uint8_t _usart_nvic;
 
     Mode _mode;
 };
diff --git a/cm3cpp/usart_rb.hpp b/cm3cpp/usart_rb.hpp
index 23a5fd6..c82666f 100644
--- a/cm3cpp/usart_rb.hpp
+++ b/cm3cpp/usart_rb.hpp
@@ -26,6 +26,9 @@ USART C++ Wrapper of libopencm3 library for STM32F2, STM32F4
 #ifndef CM3CPP_USART_RB_H_
 #define CM3CPP_USART_RB_H_
 
+#include <cassert>
+#include <limits>
+
 /**************************************************************************************************
  * CM3CPP INCLUDES
  *************************************************************************************************/
@@ -54,7 +57,12 @@ class UsartRb : public Usart
     void receive_handler()
     {
         if (interrupt_source_rx()) {
-            rb_in->push(read());
+            using byte_t = uint8_t;
+
+            const uint16_t byte16 = read();
+            assert(byte16 < std::numeric_limits<byte_t>::max());
+
+            rb_in->push(static_cast<byte_t>(byte16));
         }
     }
 
diff --git a/cm3cpp/utils/round_buffer.cpp b/cm3cpp/utils/round_buffer.cpp
index 79edbcb..6d4500c 100644
--- a/cm3cpp/utils/round_buffer.cpp
+++ b/cm3cpp/utils/round_buffer.cpp
@@ -113,9 +113,11 @@ int RoundBuffer::memcmp(void* buffer, uint32_t sizebuf)
     uint32_t i = 0;
     while (i < sizebuf && buf[i] == (*this)[i])
         i++;
+
     if (i == sizebuf)
         return (0);  //???????
-    return (i + 1);
+
+    return (static_cast<int32_t>(i) + 1);
 }
 
 int RoundBuffer::mem_search(void* buffer, uint32_t sizebuf)
@@ -135,9 +137,11 @@ int RoundBuffer::mem_search(void* buffer, uint32_t sizebuf)
                 break;
             }
         }
+
         if (i_word == sizebuf)
-            return (i_begin);
+            return static_cast<int32_t>(i_begin);
     }
+
     return (-2);
 }
 
diff --git a/cm3cpp/utils/round_buffer.hpp b/cm3cpp/utils/round_buffer.hpp
index ba28e76..296efb6 100644
--- a/cm3cpp/utils/round_buffer.hpp
+++ b/cm3cpp/utils/round_buffer.hpp
@@ -27,6 +27,8 @@ ROUND BUFFER implementation, public interface
 #ifndef UTILS_ROUND_BUFFER_H_
 #define UTILS_ROUND_BUFFER_H_
 
+#include <cassert>
+#include <limits>
 #include <stdint.h>
 
 #include "../private/assert.h"
@@ -129,7 +131,10 @@ class RoundBuffer
     uint8_t operator[](uint32_t index)
     {
         uint32_t pos = _head;
-        mrb_plus(&pos, index);
+
+        assert(index <= std::size_t(std::numeric_limits<int32_t>::max()));
+
+        mrb_plus(&pos, static_cast<int32_t>(index));
 
         return (_buffer[pos]);
     }
@@ -219,7 +224,10 @@ class RoundBuffer
             clear();
             return (false);
         }
-        mrb_plus(&_head, count);
+
+        assert(count <= std::size_t(std::numeric_limits<int32_t>::max()));
+        mrb_plus(&_head, static_cast<int32_t>(count));
+
         return (true);
     }
 
@@ -232,9 +240,14 @@ class RoundBuffer
 
     uint16_t get_word_unsafe(uint32_t index)
     {
-        if ((index + 1) >= get_count())
-            return (0);
-        return ((*this)[index] + ((uint16_t)(*this)[index + 1] << 8));
+        if ((index + 1) >= get_count()) {
+            return 0;
+        }
+
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wconversion"
+        return (*this)[index] + ((*this)[index + 1] << 8);
+#pragma GCC diagnostic pop
     }
 
     bool push(uint8_t byte)
@@ -275,10 +288,10 @@ class RoundBuffer
     void mrb_plus(uint32_t* par, int32_t plus)
     {
         if (plus < 0 && (*par < (uint32_t)-plus)) {
-            *par = *par + _size + plus;
+            *par += static_cast<uint32_t>(static_cast<int32_t>(_size) + plus);
             return;
         }
-        *par = *par + plus;
+        *par += static_cast<uint32_t>(plus);
         if (*par >= _size)
             *par -= _size;
     }