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author | Thomas Gleixner <tglx@linutronix.de> | 2019-07-03 11:50:21 +0300 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2019-07-03 11:50:21 +0300 |
commit | 341924049558e5f7c1a148a2c461a417933d35d9 (patch) | |
tree | 1340b4f2131737ef4be63f18ee74cd73ad12cd3e /arch/arm/mm/cache-v4wt.S | |
parent | 516337048fa40496ae5ca9863c367ec991a44d9a (diff) | |
parent | 4a8f81b8c053aad250ee247b219904ada72df9a4 (diff) |
Merge branch 'timers/vdso' into timers/core
so the hyper-v clocksource update can be applied.
Diffstat (limited to 'arch/arm/mm/cache-v4wt.S')
-rw-r--r-- | arch/arm/mm/cache-v4wt.S | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/arch/arm/mm/cache-v4wt.S b/arch/arm/mm/cache-v4wt.S index a0982ce49007..0b290c25a99d 100644 --- a/arch/arm/mm/cache-v4wt.S +++ b/arch/arm/mm/cache-v4wt.S @@ -1,12 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * linux/arch/arm/mm/cache-v4wt.S * * Copyright (C) 1997-2002 Russell king * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * * ARMv4 write through cache operations support. * * We assume that the write buffer is not enabled. |