diff options
author | Eric Bernstein <eric.bernstein@amd.com> | 2022-01-25 22:42:12 +0300 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2022-10-06 19:02:23 +0300 |
commit | fe674c0b6f5382b7c377ca2c418c26dd78b428b4 (patch) | |
tree | 9bcec9cb6981e8786a7b656b9f512bae2d84b27d /drivers/gpu/drm/amd/display/dc | |
parent | 3f4dee59253a6882acde98a2a027e55f1330ae86 (diff) |
drm/amd/display: Fix disable DSC logic in the DIO code
[Why]
In DIO stream encoder, definition of DP_DSC_MODE is changed (only
enable/disable) In OPTC, OTG_SET_V_TOTAL_MIN_MASK_EN is removed (same as
DCN3.1)
[How]
In DIO stream encoder, update enc32_dp_set_dsc_config(). In OPTC, use
DCN3.1 version for function interfaces .set_vrr_m_const and .set_drr
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_stream_encoder.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_stream_encoder.c index 40e713c4e172..d19fc93dbc75 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_stream_encoder.c +++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_stream_encoder.c @@ -388,7 +388,7 @@ static void enc32_dp_set_dsc_config(struct stream_encoder *enc, { struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc); - REG_UPDATE(DP_DSC_CNTL, DP_DSC_MODE, dsc_mode); + REG_UPDATE(DP_DSC_CNTL, DP_DSC_MODE, dsc_mode == OPTC_DSC_DISABLED ? 0 : 1); } /* this function read dsc related register fields to be logged later in dcn10_log_hw_state |