Age | Commit message (Expand) | Author |
---|---|---|
2017-11-14 | clk: hi3660: fix incorrect uart3 clock freqency | Zhong Kaihua |
2017-06-20 | clk: hi3660: Set PPLL2 to 2880M | Zhong Kaihua |
2017-06-20 | clk: hi3660: add clocks for video encoder, decoder and ISP | Chen Jun |
2017-06-20 | clk: hi3660: fix wrong parent name of clk_mux_sysbus | Chen Jun |
2017-06-20 | clk: Hi3660: register fixed_rate_clks with CLK_OF_DECLARE_DRIVER | Leo Yan |
2017-01-10 | clk: hisilicon: Add clock driver for hi3660 SoC | Zhangfei Gao |