diff options
| author | Jonathan Lennox <jonathan@vidyo.com> | 2015-08-04 00:04:27 +0300 |
|---|---|---|
| committer | Jean-Marc Valin <jmvalin@jmvalin.ca> | 2015-09-02 00:21:31 +0300 |
| commit | 43120f00758219a784f952754f33b9788a8d731b (patch) | |
| tree | b1dd751c49c18c6d7c3a65f30be04476cb2903b6 /celt/mips/celt_mipsr1.h | |
| parent | cb0875e07d7cac701b465863f532dc5bb8b0eb59 (diff) | |
Reorganize x86 SSE intrinsics code.
Enable x86 intrinsics when building in floating-point mode.
Support SSE as an arch value.
Use RTCD to conditionally enable existing floating-point Celt SSE code.
Call functions directly (without RTCD) when their architecture can be presumed.
Use SSE4.1 intrinsics optimized code for Silk even in floating-point mode.
Diffstat (limited to 'celt/mips/celt_mipsr1.h')
| -rw-r--r-- | celt/mips/celt_mipsr1.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/celt/mips/celt_mipsr1.h b/celt/mips/celt_mipsr1.h index 03915d88..7915d596 100644 --- a/celt/mips/celt_mipsr1.h +++ b/celt/mips/celt_mipsr1.h @@ -56,7 +56,7 @@ #define OVERRIDE_comb_filter void comb_filter(opus_val32 *y, opus_val32 *x, int T0, int T1, int N, opus_val16 g0, opus_val16 g1, int tapset0, int tapset1, - const opus_val16 *window, int overlap) + const opus_val16 *window, int overlap, int arch) { int i; opus_val32 x0, x1, x2, x3, x4; |