Age | Commit message (Collapse) | Author | |
---|---|---|---|
2024-01-22 | Initial DRED tuningexp_dred_tuning1 | Jean-Marc Valin | |
Adjust q0, qD and duration based on bitrate and loss. | |||
2024-01-22 | switched to smaller NoLACE model | Jan Buethe | |
2024-01-22 | bugfix in SilkFeatureNetPL | Jan Buethe | |
2024-01-22 | OSCE_MAX_RNN_UNITS now derived from osce model parameters | Jan Buethe | |
2024-01-21 | Remove run-time code for old TF2 modelsexp_plc_fix5 | Jean-Marc Valin | |
No longer needed now that PLC is trained with PyTorch stack | |||
2024-01-21 | Using PyTorch model (same architecture for now) | Jean-Marc Valin | |
2024-01-21 | Improving PLC | Jean-Marc Valin | |
Should handle the history in a more consistent way. Slightly increase the model size and re-enable biased band loss in training. | |||
2024-01-20 | Updated LACE and NoLACE models to version 2opus-ng-osce-models-v2 | Jan Buethe | |
2024-01-17 | PLC export script | Jean-Marc Valin | |
mostly untested | |||
2024-01-16 | PyTorch code for training the PLC model | Jean-Marc Valin | |
Should match the TF2 code, but mostly untested | |||
2023-12-23 | Prevent overshoots from CELT PLC with predictionexp_celt_plc_constraint1 | Jean-Marc Valin | |
Constrains the energy prediction to something safe. | |||
2023-12-22 | Add simulated loss to opus_demo | Jean-Marc Valin | |
2023-12-22 | Make loss simulator standalone | Jean-Marc Valin | |
2023-12-22 | C code for packet loss simulator | Jean-Marc Valin | |
2023-12-22 | lossgen: better training, README.md | Jean-Marc Valin | |
2023-12-22 | lossgen: can now dump weights | Jean-Marc Valin | |
2023-12-21 | Packet loss generation model | Jean-Marc Valin | |
2023-12-20 | Merge LACE/NoLACE under OSCE frameworkopus-ng-lace-integration5 | Jan Buethe | |
2023-12-17 | Initialize padding pointers to zero | Jean-Marc Valin | |
Avoids valgrind complaining about use of uninitialized memory | |||
2023-12-15 | use opus_(re)alloc and opus_free for dnn and DRED related functionsopus-ng-fix-alloc | Michael Klingbeil | |
2023-12-14 | handle extensions in opus_repacketizer_out_range_impl | Michael Klingbeil | |
2023-12-06 | add extensions of the first frame of a multiframe packet | Michael Klingbeil | |
2023-12-06 | Fix RESYNTH bit rot | Jean-Marc Valin | |
2023-11-30 | use vec_avx.h for MSVC builds | Michael Klingbeil | |
2023-11-30 | don't redefine _mm_loadu_si32 on MSVC | Michael Klingbeil | |
2023-11-30 | Defining __SSEx__ macros when needed for MSVC | Jean-Marc Valin | |
2023-11-29 | fix autogen.bat model download | Michael Klingbeil | |
2023-11-29 | Add a script to shrink the DNN models | Jean-Marc Valin | |
Removes float debug weights, as well as useless spaces | |||
2023-11-29 | Fix Windows path | Jean-Marc Valin | |
2023-11-29 | Fix model download path for windows | Jean-Marc Valin | |
2023-11-29 | Opus github ci files | Jean-Marc Valin | |
Use OPUS_DRED instead of NEURAL_FEC | |||
2023-11-29 | Add dotprod support to meson | Jean-Marc Valin | |
Also default to disabling dnn float debugging | |||
2023-11-29 | Trying to fix/update meson build | Jean-Marc Valin | |
Still don't quite know what I'm doing | |||
2023-11-28 | Oops, fix the fixed-point build | Jean-Marc Valin | |
2023-11-28 | Trying to use fma instructions when possible | Jean-Marc Valin | |
Compilers sometimes replace vmlaq*() with fmul+fadd instead of fmla. Trying to use vfmaq*() instead when possible. | |||
2023-11-28 | FARGAN model update | Jean-Marc Valin | |
Finished adversarial training on 800k model. Also, move weights to a new location. | |||
2023-11-28 | Fixes for ARMv7/AArch32 | Jean-Marc Valin | |
1) Enable asm/intrinsics even for floating-point 2) Make sure ARMv8 asimd enables EDSP/MEDIA/Neon 3) Add dotp architecture to rtcd table since AArch *can* have dotp | |||
2023-11-28 | Enabling DNN optimizations for ARMv7 | Jean-Marc Valin | |
Adds RTCD tables for compute_activation() and compute_conv2d() | |||
2023-11-28 | Only force auto-vectorization for GCC >= 5.1 | Jean-Marc Valin | |
2023-11-28 | Force vectorization for DNN primitives | Jean-Marc Valin | |
Avoids having to write intrinsics for simple loops | |||
2023-11-27 | Enable floating-point approximations by default | Jean-Marc Valin | |
Enabling only on platforms that have been tested just in case we run into a non-IEEE754 platform where they would break. | |||
2023-11-27 | Fix ARMv7 optimizations for DNN code | Jean-Marc Valin | |
2023-11-26 | First step towards DNN optimization for ARMv7 Neon | Jean-Marc Valin | |
Still missing some intrinsics | |||
2023-11-26 | Fix potential read out of bounds in fargan | Jean-Marc Valin | |
2023-11-25 | Adding dotprod instruction to ARM rtcd | Jean-Marc Valin | |
Used for DNN matrix multiplies | |||
2023-11-25 | Speed up cross-correlation normalization | Jean-Marc Valin | |
2023-11-25 | Use arch-specific celt_inner_prod() for features | Jean-Marc Valin | |
2023-11-25 | Optimize biquad() to reduce dependency chains | Jean-Marc Valin | |
2023-11-24 | Remove process_single_frame() | Jean-Marc Valin | |
Code moved to compute_frame_features() | |||
2023-11-24 | Remove feature writing (fwrite()) from libopus | Jean-Marc Valin | |