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2024-01-16Improving PLCexp_plc_fix1Jean-Marc Valin
Should handle the history in a more consistent way. Slightly increase the model size and re-enable biased band loss in training.
2024-01-16PyTorch code for training the PLC modelJean-Marc Valin
Should match the TF2 code, but mostly untested
2023-12-23Prevent overshoots from CELT PLC with predictionexp_celt_plc_constraint1Jean-Marc Valin
Constrains the energy prediction to something safe.
2023-12-22Add simulated loss to opus_demoJean-Marc Valin
2023-12-22Make loss simulator standaloneJean-Marc Valin
2023-12-22C code for packet loss simulatorJean-Marc Valin
2023-12-22lossgen: better training, README.mdJean-Marc Valin
2023-12-22lossgen: can now dump weightsJean-Marc Valin
2023-12-21Packet loss generation modelJean-Marc Valin
2023-12-20Merge LACE/NoLACE under OSCE frameworkopus-ng-lace-integration5Jan Buethe
2023-12-17Initialize padding pointers to zeroJean-Marc Valin
Avoids valgrind complaining about use of uninitialized memory
2023-12-15use opus_(re)alloc and opus_free for dnn and DRED related functionsopus-ng-fix-allocMichael Klingbeil
2023-12-14handle extensions in opus_repacketizer_out_range_implMichael Klingbeil
2023-12-06add extensions of the first frame of a multiframe packetMichael Klingbeil
2023-12-06Fix RESYNTH bit rotJean-Marc Valin
2023-11-30use vec_avx.h for MSVC buildsMichael Klingbeil
2023-11-30don't redefine _mm_loadu_si32 on MSVCMichael Klingbeil
2023-11-30Defining __SSEx__ macros when needed for MSVCJean-Marc Valin
2023-11-29fix autogen.bat model downloadMichael Klingbeil
2023-11-29Add a script to shrink the DNN modelsJean-Marc Valin
Removes float debug weights, as well as useless spaces
2023-11-29Fix Windows pathJean-Marc Valin
2023-11-29Fix model download path for windowsJean-Marc Valin
2023-11-29Opus github ci filesJean-Marc Valin
Use OPUS_DRED instead of NEURAL_FEC
2023-11-29Add dotprod support to mesonJean-Marc Valin
Also default to disabling dnn float debugging
2023-11-29Trying to fix/update meson buildJean-Marc Valin
Still don't quite know what I'm doing
2023-11-28Oops, fix the fixed-point buildJean-Marc Valin
2023-11-28Trying to use fma instructions when possibleJean-Marc Valin
Compilers sometimes replace vmlaq*() with fmul+fadd instead of fmla. Trying to use vfmaq*() instead when possible.
2023-11-28FARGAN model updateJean-Marc Valin
Finished adversarial training on 800k model. Also, move weights to a new location.
2023-11-28Fixes for ARMv7/AArch32Jean-Marc Valin
1) Enable asm/intrinsics even for floating-point 2) Make sure ARMv8 asimd enables EDSP/MEDIA/Neon 3) Add dotp architecture to rtcd table since AArch *can* have dotp
2023-11-28Enabling DNN optimizations for ARMv7Jean-Marc Valin
Adds RTCD tables for compute_activation() and compute_conv2d()
2023-11-28Only force auto-vectorization for GCC >= 5.1Jean-Marc Valin
2023-11-28Force vectorization for DNN primitivesJean-Marc Valin
Avoids having to write intrinsics for simple loops
2023-11-27Enable floating-point approximations by defaultJean-Marc Valin
Enabling only on platforms that have been tested just in case we run into a non-IEEE754 platform where they would break.
2023-11-27Fix ARMv7 optimizations for DNN codeJean-Marc Valin
2023-11-26First step towards DNN optimization for ARMv7 NeonJean-Marc Valin
Still missing some intrinsics
2023-11-26Fix potential read out of bounds in farganJean-Marc Valin
2023-11-25Adding dotprod instruction to ARM rtcdJean-Marc Valin
Used for DNN matrix multiplies
2023-11-25Speed up cross-correlation normalizationJean-Marc Valin
2023-11-25Use arch-specific celt_inner_prod() for featuresJean-Marc Valin
2023-11-25Optimize biquad() to reduce dependency chainsJean-Marc Valin
2023-11-24Remove process_single_frame()Jean-Marc Valin
Code moved to compute_frame_features()
2023-11-24Remove feature writing (fwrite()) from libopusJean-Marc Valin
2023-11-22Using the same condition for enabling rtcdJean-Marc Valin
for cmake, force PRESEUME_SSE4_1 on PRESUME_AVX2
2023-11-22Trying to fix CMake buildJean-Marc Valin
aka banging on it until it builds on my machine. Further improvements welcome
2023-11-21Add rtcd for silk_inner_product_FLP()Jean-Marc Valin
2023-11-21Start enabling AVX2 silk_inner_product_FLP()Jean-Marc Valin
Not yet with rtcd
2023-11-21Avoids AVX2 optimizations being disabledJean-Marc Valin
2023-11-21Use SILK VBR when using CBR with DREDJean-Marc Valin
DRED will absorb the bitrate variation
2023-11-21Misc fixes on previous patchJean-Marc Valin
Fixes warnings, undefined behaviour, and check-asm failure
2023-11-21Optimize NSQ_del_dec() for AVX2Victor Ding
The optimization is bit-exact with C function. This optimization speeds up SILK encoder (floating point) as following: AMD Zen: Complexity 0-5 : 0% Complexity 6-7 : 3 - 7% Complexity 8-10: 8 - 15% Intel Skylake: Complexity 0-5 : 0% Complexity 6-7 : 14 - 18% Complexity 8-10: 17 - 22% Adapted by Jean-Marc Valin
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-23 19:23:10 +0300