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Enables "safes" assertions even with ENABLE_ASSERTIONS isn't set
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Distinguish source files for the SSE 4.1 instruction
set extension consistently by their filename. This makes
it easier to check the correct flags are being set at
build time.
Signed-off-by: Jonathan Lennox <jonathan@vidyo.com>
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some SSE optimizations were using an instruction sequence that required
128-bit alignment, even though this is not always guaranteed. The error
was in handling a 64-bit entity; made the same macro changes that had
been done previously for 32-bit entities.
Signed-off-by: Felicia Lim <flim@google.com>
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- celt/modes.c:430:14: warning: cast from 'const unsigned char *' to
'opus_int16 *' increases required alignment from 1 to 2 [-Wcast-align]
- 'C[0][1]' may be used uninitialized [-Wmaybe-uninitialized]
- Unused variable/parameter
- Value stored is never read
- MSVC warnings about "possible loss of data" due to type conversions
- MSVC warning C4146: unary minus operator applied to unsigned type
- silk/NLSF_del_dec_quant.c:137:20: warning: array subscript is above
array bounds [-Warray-bounds] (gcc -O3 false positive)
- src/mlp_train.h:39:20: warning: function declaration isn't a prototype
[-Wstrict-prototypes]
- Remove SMALL_FOOTPRINT code from SSE 4.1 FIR implementation, matching
the C implementation.
The clang -Wcast-align warnings with SSE intrinsics are a known
clang issue: https://llvm.org/bugs/show_bug.cgi?id=20670
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The "mem" in celt_fir_c() either is contained in the head of input "x"
in reverse order already, or can be easily attached to the head of "x"
before calling the function. Removing argument "mem" can eliminate the
redundant buffer copies inside.
Update celt_fir_sse4_1() accordingly.
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We used the SSE reciprocal square root instruction to vectorize the serch rather
than compare one at a time with multiplies. Speeds up the entire encoder by 8-10%.
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There are no tabs in source code.
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Signed-off-by: Jean-Marc Valin <jmvalin@jmvalin.ca>
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Signed-off-by: Timothy B. Terriberry <tterribe@xiph.org>
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Signed-off-by: Timothy B. Terriberry <tterribe@xiph.org>
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Enable x86 intrinsics when building in floating-point mode.
Support SSE as an arch value.
Use RTCD to conditionally enable existing floating-point Celt SSE code.
Call functions directly (without RTCD) when their architecture can be presumed.
Use SSE4.1 intrinsics optimized code for Silk even in floating-point mode.
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with appropriate compiler flags. Otherwise, compilers are allowed to take advantage of (e.g.) -msse4.1 to generate code that uses SSE4.1 instructions, even when no SSE4.1 intrinsics are explicitly used in the source.
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_mm_cvtepi16_epi32, only for _mm_cvtepi8_epi32. Adjust comment accordingly.
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We already needed these macros for gcc with optimizations disabled,
but it appears clang needs them all the time.
Thanks to Jonathan Lennox for the report.
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During review of c95c9a048f32, I replaced a call to
_mm_cvtepi8_epi32() with the OP_CVTEPI16_EPI32_M64() macro (note
the 16 instead of 8).
Make a separate OP_CVTEPI8_EPI32_M32() macro and use that instead.
Thaks to Wei Zhou for the report.
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This should not take an arch parameter, so it can properly be used
as a fallback for accelerated versions which do not.
This patch instead provides a separate version which can call
accelerated helpers for platforms that have taken that approach.
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1. Only for fixed point on x86 platform (32bit and 64bit, uses SIMD
intrinsics up to SSE4.2)
2. Use "configure --enable-fixed-point --enable-intrinsics" to enable
optimization, default is disabled.
3. Official test cases are verified and passed.
Signed-off-by: Timothy B. Terriberry <tterribe@xiph.org>
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Also adds an SSE-optimized celt_inner_prod().
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Newer versions of MSVC are unhappy with the strategy of the build
environment redefining "inline" (even though they don't support the
actual keyword). Instead we define OPUS_INLINE to the right thing
in opus_defines.h.
This is the same approach we use for restrict.
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Should make it easy to adapt to other architectures.
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Should be trivial to adapt for Neon.
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The loop no longer reads past its buffer and is slightly faster.
Also fixes RESTORE_STACK in celt_iir().
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There's no CPU detection for it, it only gets enabled by __SSE__
which gcc (other compilers?) defines automatically when supported
by -march=, which means at least all x86-64. For ia32, the user needs to
enable it in the CFLAGS.
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With minor fixes
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Uses a 5ms redundant CELT frame embedded into the SILK or hybrid
packet to handle the switching. It's still possible to use the
PLC-based method when no redundant packet is included.
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