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authorAlexey 'Cluster' Avdyukhin <clusterrr@clusterrr.com>2022-09-27 11:10:55 +0300
committerAlexey 'Cluster' Avdyukhin <clusterrr@clusterrr.com>2022-09-27 11:10:55 +0300
commit5a58ff5ad2f7c6f5898abbc4c6f570ed70d481c6 (patch)
treeac43b155a930b147a7b6e04e04d79ab21c370107 /STM32
parent5c8b9c01f59d79ecbf2669fc5556003567483d53 (diff)
Misc
Diffstat (limited to 'STM32')
-rw-r--r--STM32/Core/Inc/dumper.h10
-rw-r--r--STM32/Core/Src/led.c1
-rw-r--r--STM32/Core/Src/main.c153
-rw-r--r--STM32/FamicomDumper.ioc3
-rw-r--r--STM32/STM32F103ZETX_FLASH.ld29
-rw-r--r--STM32/STM32F103ZETX_FLASH_debug.ld28
6 files changed, 117 insertions, 107 deletions
diff --git a/STM32/Core/Inc/dumper.h b/STM32/Core/Inc/dumper.h
index e24c09b..36eb96b 100644
--- a/STM32/Core/Inc/dumper.h
+++ b/STM32/Core/Inc/dumper.h
@@ -1,9 +1,12 @@
#ifndef _DUMPER_H_
#define _DUMPER_H_
-#define PROTOCOL_VERSION 3
-#define FIRMWARE_VERSION_MAJOR 2
+#define PROTOCOL_VERSION 4
+#define FIRMWARE_VERSION_MAJOR 3
#define FIRMWARE_VERSION_MINOR 0
+#define FIRMWARE_VERSION_SUFFIX 0
+#define HARDWARE_VERSION_ADDRESS 0x08070000 - 2048
+#define HARDWARE_VERSION ((volatile uint8_t*)(HARDWARE_VERSION_ADDRESS))
#define FDS_IRQ_CONTROL 0x4022
#define FDS_MASTER_IO 0x4023
@@ -49,8 +52,7 @@ void read_chr_crc_send(uint16_t address, uint16_t len);
void write_chr(uint16_t address, uint16_t len, uint8_t *data);
void erase_flash_sector();
void write_flash(uint16_t address, uint16_t len, uint8_t *data);
-void fds_transfer(uint8_t block_read_start, uint8_t block_read_count, uint8_t block_write_count, uint8_t* block_write_ids, uint16_t *write_lengths,
- uint8_t *write_data);
+void fds_transfer(uint8_t block_read_start, uint8_t block_read_count, uint8_t block_write_count, uint8_t *block_write_ids, uint16_t *write_lengths, uint8_t *write_data);
void get_mirroring();
void set_coolboy_gpio_mode(uint8_t coolboy_gpio_mode);
diff --git a/STM32/Core/Src/led.c b/STM32/Core/Src/led.c
index b7902ba..719b5a0 100644
--- a/STM32/Core/Src/led.c
+++ b/STM32/Core/Src/led.c
@@ -62,7 +62,6 @@ static rgb hsv2rgb(hsv in)
out.g = in.v;
out.b = t;
break;
-
case 3:
out.r = p;
out.g = q;
diff --git a/STM32/Core/Src/main.c b/STM32/Core/Src/main.c
index b1ed729..263803f 100644
--- a/STM32/Core/Src/main.c
+++ b/STM32/Core/Src/main.c
@@ -44,7 +44,7 @@
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
- TIM_HandleTypeDef htim1;
+TIM_HandleTypeDef htim1;
TIM_HandleTypeDef htim2;
TIM_HandleTypeDef htim3;
TIM_HandleTypeDef htim4;
@@ -85,9 +85,9 @@ int _write(int file, char *ptr, int len)
/* USER CODE END 0 */
/**
- * @brief The application entry point.
- * @retval int
- */
+ * @brief The application entry point.
+ * @retval int
+ */
int main(void)
{
/* USER CODE BEGIN 1 */
@@ -149,7 +149,7 @@ int main(void)
switch (comm_recv_command)
{
case COMMAND_PRG_INIT:
- comm_start(COMMAND_PRG_STARTED, 9);
+ comm_start(COMMAND_PRG_STARTED, 13);
comm_send_byte(PROTOCOL_VERSION);
comm_send_byte(0xFF);
comm_send_byte(0xFF); // unlimited send buffer
@@ -157,12 +157,19 @@ int main(void)
comm_send_byte(((RECV_BUFFER_SIZE - 5) >> 8) & 0xFF);
comm_send_byte(FIRMWARE_VERSION_MAJOR & 0xFF);
comm_send_byte((FIRMWARE_VERSION_MAJOR >> 8) & 0xFF);
- comm_send_byte(FIRMWARE_VERSION_MINOR & 0xFF);
- comm_send_byte((FIRMWARE_VERSION_MINOR >> 8) & 0xFF);
- comm_send_byte(FIRMWARE_VERSION_MAJOR & 0xFF);
- comm_send_byte((FIRMWARE_VERSION_MAJOR >> 8) & 0xFF);
- comm_send_byte(FIRMWARE_VERSION_MINOR & 0xFF);
- comm_send_byte((FIRMWARE_VERSION_MINOR >> 8) & 0xFF);
+ comm_send_byte(FIRMWARE_VERSION_MINOR);
+ comm_send_byte(FIRMWARE_VERSION_SUFFIX);
+#ifndef DEBUG
+ comm_send_byte(HARDWARE_VERSION[0]);
+ comm_send_byte(HARDWARE_VERSION[1]);
+ comm_send_byte(HARDWARE_VERSION[2]);
+ comm_send_byte(HARDWARE_VERSION[3]);
+#else
+ comm_send_byte(0);
+ comm_send_byte(0);
+ comm_send_byte(0);
+ comm_send_byte(0);
+#endif
set_coolboy_gpio_mode(0);
break;
@@ -231,8 +238,7 @@ int main(void)
break;
case COMMAND_FDS_WRITE_REQUEST:
- fds_transfer(0, 0, recv_buffer[0], (uint8_t*) &recv_buffer[1], (uint16_t*) &recv_buffer[1 + recv_buffer[0]],
- (uint8_t*) &recv_buffer[1 + recv_buffer[0] + recv_buffer[0] * 2]);
+ fds_transfer(0, 0, recv_buffer[0], (uint8_t*) &recv_buffer[1], (uint16_t*) &recv_buffer[1 + recv_buffer[0]], (uint8_t*) &recv_buffer[1 + recv_buffer[0] + recv_buffer[0] * 2]);
break;
case COMMAND_MIRRORING_REQUEST:
@@ -245,7 +251,7 @@ int main(void)
break;
case COMMAND_SET_COOLBOY_GPIO_MODE:
- set_coolboy_gpio_mode(recv_buffer[0]);
+ set_coolboy_gpio_mode(recv_buffer[0]);
comm_start(COMMAND_SET_VALUE_DONE, 0);
break;
}
@@ -259,18 +265,18 @@ int main(void)
}
/**
- * @brief System Clock Configuration
- * @retval None
- */
+ * @brief System Clock Configuration
+ * @retval None
+ */
void SystemClock_Config(void)
{
- RCC_OscInitTypeDef RCC_OscInitStruct = {0};
- RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
- RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+ RCC_OscInitTypeDef RCC_OscInitStruct = { 0 };
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 };
+ RCC_PeriphCLKInitTypeDef PeriphClkInit = { 0 };
/** Initializes the RCC Oscillators according to the specified parameters
- * in the RCC_OscInitTypeDef structure.
- */
+ * in the RCC_OscInitTypeDef structure.
+ */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV2;
@@ -284,9 +290,8 @@ void SystemClock_Config(void)
}
/** Initializes the CPU, AHB and APB buses clocks
- */
- RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
- |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
@@ -306,10 +311,10 @@ void SystemClock_Config(void)
}
/**
- * @brief TIM1 Initialization Function
- * @param None
- * @retval None
- */
+ * @brief TIM1 Initialization Function
+ * @param None
+ * @retval None
+ */
static void MX_TIM1_Init(void)
{
@@ -317,8 +322,8 @@ static void MX_TIM1_Init(void)
/* USER CODE END TIM1_Init 0 */
- TIM_ClockConfigTypeDef sClockSourceConfig = {0};
- TIM_MasterConfigTypeDef sMasterConfig = {0};
+ TIM_ClockConfigTypeDef sClockSourceConfig = { 0 };
+ TIM_MasterConfigTypeDef sMasterConfig = { 0 };
/* USER CODE BEGIN TIM1_Init 1 */
@@ -352,10 +357,10 @@ static void MX_TIM1_Init(void)
}
/**
- * @brief TIM2 Initialization Function
- * @param None
- * @retval None
- */
+ * @brief TIM2 Initialization Function
+ * @param None
+ * @retval None
+ */
static void MX_TIM2_Init(void)
{
@@ -363,9 +368,9 @@ static void MX_TIM2_Init(void)
/* USER CODE END TIM2_Init 0 */
- TIM_ClockConfigTypeDef sClockSourceConfig = {0};
- TIM_MasterConfigTypeDef sMasterConfig = {0};
- TIM_OC_InitTypeDef sConfigOC = {0};
+ TIM_ClockConfigTypeDef sClockSourceConfig = { 0 };
+ TIM_MasterConfigTypeDef sMasterConfig = { 0 };
+ TIM_OC_InitTypeDef sConfigOC = { 0 };
/* USER CODE BEGIN TIM2_Init 1 */
@@ -411,10 +416,10 @@ static void MX_TIM2_Init(void)
}
/**
- * @brief TIM3 Initialization Function
- * @param None
- * @retval None
- */
+ * @brief TIM3 Initialization Function
+ * @param None
+ * @retval None
+ */
static void MX_TIM3_Init(void)
{
@@ -422,8 +427,8 @@ static void MX_TIM3_Init(void)
/* USER CODE END TIM3_Init 0 */
- TIM_SlaveConfigTypeDef sSlaveConfig = {0};
- TIM_MasterConfigTypeDef sMasterConfig = {0};
+ TIM_SlaveConfigTypeDef sSlaveConfig = { 0 };
+ TIM_MasterConfigTypeDef sMasterConfig = { 0 };
/* USER CODE BEGIN TIM3_Init 1 */
@@ -457,10 +462,10 @@ static void MX_TIM3_Init(void)
}
/**
- * @brief TIM4 Initialization Function
- * @param None
- * @retval None
- */
+ * @brief TIM4 Initialization Function
+ * @param None
+ * @retval None
+ */
static void MX_TIM4_Init(void)
{
@@ -468,8 +473,8 @@ static void MX_TIM4_Init(void)
/* USER CODE END TIM4_Init 0 */
- TIM_SlaveConfigTypeDef sSlaveConfig = {0};
- TIM_MasterConfigTypeDef sMasterConfig = {0};
+ TIM_SlaveConfigTypeDef sSlaveConfig = { 0 };
+ TIM_MasterConfigTypeDef sMasterConfig = { 0 };
/* USER CODE BEGIN TIM4_Init 1 */
@@ -503,10 +508,10 @@ static void MX_TIM4_Init(void)
}
/**
- * @brief TIM5 Initialization Function
- * @param None
- * @retval None
- */
+ * @brief TIM5 Initialization Function
+ * @param None
+ * @retval None
+ */
static void MX_TIM5_Init(void)
{
@@ -514,9 +519,9 @@ static void MX_TIM5_Init(void)
/* USER CODE END TIM5_Init 0 */
- TIM_ClockConfigTypeDef sClockSourceConfig = {0};
- TIM_MasterConfigTypeDef sMasterConfig = {0};
- TIM_OC_InitTypeDef sConfigOC = {0};
+ TIM_ClockConfigTypeDef sClockSourceConfig = { 0 };
+ TIM_MasterConfigTypeDef sMasterConfig = { 0 };
+ TIM_OC_InitTypeDef sConfigOC = { 0 };
/* USER CODE BEGIN TIM5_Init 1 */
@@ -562,8 +567,8 @@ static void MX_TIM5_Init(void)
}
/**
- * Enable DMA controller clock
- */
+ * Enable DMA controller clock
+ */
static void MX_DMA_Init(void)
{
@@ -578,13 +583,13 @@ static void MX_DMA_Init(void)
}
/**
- * @brief GPIO Initialization Function
- * @param None
- * @retval None
- */
+ * @brief GPIO Initialization Function
+ * @param None
+ * @retval None
+ */
static void MX_GPIO_Init(void)
{
- GPIO_InitTypeDef GPIO_InitStruct = {0};
+ GPIO_InitTypeDef GPIO_InitStruct = { 0 };
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOF_CLK_ENABLE();
@@ -614,7 +619,7 @@ static void MX_GPIO_Init(void)
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/*Configure GPIO pins : CIRAM_CE_Pin CIRAM_A10_Pin */
- GPIO_InitStruct.Pin = CIRAM_CE_Pin|CIRAM_A10_Pin;
+ GPIO_InitStruct.Pin = CIRAM_CE_Pin | CIRAM_A10_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
@@ -642,14 +647,14 @@ static void MX_FSMC_Init(void)
/* USER CODE END FSMC_Init 0 */
- FSMC_NORSRAM_TimingTypeDef Timing = {0};
+ FSMC_NORSRAM_TimingTypeDef Timing = { 0 };
/* USER CODE BEGIN FSMC_Init 1 */
/* USER CODE END FSMC_Init 1 */
/** Perform the SRAM1 memory initialization sequence
- */
+ */
hsram1.Instance = FSMC_NORSRAM_DEVICE;
hsram1.Extended = FSMC_NORSRAM_EXTENDED_DEVICE;
/* hsram1.Init */
@@ -678,11 +683,11 @@ static void MX_FSMC_Init(void)
if (HAL_SRAM_Init(&hsram1, &Timing, NULL) != HAL_OK)
{
- Error_Handler( );
+ Error_Handler();
}
/** Perform the SRAM2 memory initialization sequence
- */
+ */
hsram2.Instance = FSMC_NORSRAM_DEVICE;
hsram2.Extended = FSMC_NORSRAM_EXTENDED_DEVICE;
/* hsram2.Init */
@@ -711,11 +716,11 @@ static void MX_FSMC_Init(void)
if (HAL_SRAM_Init(&hsram2, &Timing, NULL) != HAL_OK)
{
- Error_Handler( );
+ Error_Handler();
}
/** Disconnect NADV
- */
+ */
__HAL_AFIO_FSMCNADV_DISCONNECTED();
@@ -729,9 +734,9 @@ static void MX_FSMC_Init(void)
/* USER CODE END 4 */
/**
- * @brief This function is executed in case of error occurrence.
- * @retval None
- */
+ * @brief This function is executed in case of error occurrence.
+ * @retval None
+ */
void Error_Handler(void)
{
/* USER CODE BEGIN Error_Handler_Debug */
diff --git a/STM32/FamicomDumper.ioc b/STM32/FamicomDumper.ioc
index 8553333..434ac14 100644
--- a/STM32/FamicomDumper.ioc
+++ b/STM32/FamicomDumper.ioc
@@ -343,6 +343,9 @@ TIM5.Channel-PWM\ Generation3\ CH3=TIM_CHANNEL_3
TIM5.IPParameters=Channel-PWM Generation3 CH3,Period,Pulse-PWM Generation3 CH3
TIM5.Period=107
TIM5.Pulse-PWM\ Generation3\ CH3=0
+USB.IPParameters=low_power_enable,lpm_enable
+USB.low_power_enable=DISABLE
+USB.lpm_enable=DISABLE
USB_DEVICE.CLASS_NAME_FS=CDC
USB_DEVICE.IPParameters=VirtualMode,VirtualModeFS,CLASS_NAME_FS,VID,MANUFACTURER_STRING,PID_CDC_FS,PRODUCT_STRING_CDC_FS
USB_DEVICE.MANUFACTURER_STRING=Cluster
diff --git a/STM32/STM32F103ZETX_FLASH.ld b/STM32/STM32F103ZETX_FLASH.ld
index 7c824b1..ba58a03 100644
--- a/STM32/STM32F103ZETX_FLASH.ld
+++ b/STM32/STM32F103ZETX_FLASH.ld
@@ -3,7 +3,7 @@
* @file LinkerScript.ld
* @author Auto-generated by STM32CubeIDE
* @brief Linker script for STM32F103ZETx Device from STM32F1 series
- * 512Kbytes FLASH
+ * 512Kbytes APP
* 64Kbytes RAM
*
* Set heap size, stack size and stack location according
@@ -37,21 +37,22 @@ _Min_Stack_Size = 0x400 ; /* required amount of stack */
MEMORY
{
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K
- FLASH (rx) : ORIGIN = 0x08040000, LENGTH = 192K
+ BOOT (rx) : ORIGIN = 0x08000000, LENGTH = 64K
+ APP (rx) : ORIGIN = 0x08040000, LENGTH = 192K
}
/* Sections */
SECTIONS
{
- /* The startup code into "FLASH" Rom type memory */
+ /* The startup code into "APP" Rom type memory */
.isr_vector :
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
. = ALIGN(4);
- } >FLASH
+ } >APP
- /* The program code and other data into "FLASH" Rom type memory */
+ /* The program code and other data into "APP" Rom type memory */
.text :
{
. = ALIGN(4);
@@ -66,22 +67,22 @@ SECTIONS
. = ALIGN(4);
_etext = .; /* define a global symbols at end of code */
- } >FLASH
+ } >APP
- /* Constant data into "FLASH" Rom type memory */
+ /* Constant data into "APP" Rom type memory */
.rodata :
{
. = ALIGN(4);
*(.rodata) /* .rodata sections (constants, strings, etc.) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
. = ALIGN(4);
- } >FLASH
+ } >APP
.ARM.extab : {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
- } >FLASH
+ } >APP
.ARM : {
. = ALIGN(4);
@@ -89,7 +90,7 @@ SECTIONS
*(.ARM.exidx*)
__exidx_end = .;
. = ALIGN(4);
- } >FLASH
+ } >APP
.preinit_array :
{
@@ -98,7 +99,7 @@ SECTIONS
KEEP (*(.preinit_array*))
PROVIDE_HIDDEN (__preinit_array_end = .);
. = ALIGN(4);
- } >FLASH
+ } >APP
.init_array :
{
@@ -108,7 +109,7 @@ SECTIONS
KEEP (*(.init_array*))
PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(4);
- } >FLASH
+ } >APP
.fini_array :
{
@@ -118,7 +119,7 @@ SECTIONS
KEEP (*(.fini_array*))
PROVIDE_HIDDEN (__fini_array_end = .);
. = ALIGN(4);
- } >FLASH
+ } >APP
/* Used by the startup to initialize data */
_sidata = LOADADDR(.data);
@@ -136,7 +137,7 @@ SECTIONS
. = ALIGN(4);
_edata = .; /* define a global symbol at data end */
- } >RAM AT> FLASH
+ } >RAM AT> APP
/* Uninitialized data section into "RAM" Ram type memory */
. = ALIGN(4);
diff --git a/STM32/STM32F103ZETX_FLASH_debug.ld b/STM32/STM32F103ZETX_FLASH_debug.ld
index 92497f4..0baefba 100644
--- a/STM32/STM32F103ZETX_FLASH_debug.ld
+++ b/STM32/STM32F103ZETX_FLASH_debug.ld
@@ -3,7 +3,7 @@
* @file LinkerScript.ld
* @author Auto-generated by STM32CubeIDE
* @brief Linker script for STM32F103ZETx Device from STM32F1 series
- * 512Kbytes FLASH
+ * 512Kbytes APP
* 64Kbytes RAM
*
* Set heap size, stack size and stack location according
@@ -37,21 +37,21 @@ _Min_Stack_Size = 0x400 ; /* required amount of stack */
MEMORY
{
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K
- FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 192K
+ APP (rx) : ORIGIN = 0x08000000, LENGTH = 192K
}
/* Sections */
SECTIONS
{
- /* The startup code into "FLASH" Rom type memory */
+ /* The startup code into "APP" Rom type memory */
.isr_vector :
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
. = ALIGN(4);
- } >FLASH
+ } >APP
- /* The program code and other data into "FLASH" Rom type memory */
+ /* The program code and other data into "APP" Rom type memory */
.text :
{
. = ALIGN(4);
@@ -66,22 +66,22 @@ SECTIONS
. = ALIGN(4);
_etext = .; /* define a global symbols at end of code */
- } >FLASH
+ } >APP
- /* Constant data into "FLASH" Rom type memory */
+ /* Constant data into "APP" Rom type memory */
.rodata :
{
. = ALIGN(4);
*(.rodata) /* .rodata sections (constants, strings, etc.) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
. = ALIGN(4);
- } >FLASH
+ } >APP
.ARM.extab : {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
- } >FLASH
+ } >APP
.ARM : {
. = ALIGN(4);
@@ -89,7 +89,7 @@ SECTIONS
*(.ARM.exidx*)
__exidx_end = .;
. = ALIGN(4);
- } >FLASH
+ } >APP
.preinit_array :
{
@@ -98,7 +98,7 @@ SECTIONS
KEEP (*(.preinit_array*))
PROVIDE_HIDDEN (__preinit_array_end = .);
. = ALIGN(4);
- } >FLASH
+ } >APP
.init_array :
{
@@ -108,7 +108,7 @@ SECTIONS
KEEP (*(.init_array*))
PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(4);
- } >FLASH
+ } >APP
.fini_array :
{
@@ -118,7 +118,7 @@ SECTIONS
KEEP (*(.fini_array*))
PROVIDE_HIDDEN (__fini_array_end = .);
. = ALIGN(4);
- } >FLASH
+ } >APP
/* Used by the startup to initialize data */
_sidata = LOADADDR(.data);
@@ -136,7 +136,7 @@ SECTIONS
. = ALIGN(4);
_edata = .; /* define a global symbol at data end */
- } >RAM AT> FLASH
+ } >RAM AT> APP
/* Uninitialized data section into "RAM" Ram type memory */
. = ALIGN(4);