Age | Commit message (Expand) | Author |
---|---|---|
2021-06-14 | Do not mark op2 as delayRegFree if op1==op2 (#53964) | Kunal Pathak |
2021-05-18 | Port SIMDIntrinsicGetItem and SIMDIntrinsicSetItem to be implemented via HWIn... | Tanner Gooding |
2021-04-20 | Updating Vector<T> to support nint and nuint (#50832) | Tanner Gooding |
2021-02-10 | [RyuJIT] Implement Interlocked.And and Interlocked.Or for arm64-v8.1 (#46253) | Egor Bogatov |
2020-12-08 | December infra rollout - remove duplicated 'src' from coreclr subrepo (src/co... | Tomáš Rylek |