diff options
| author | Andrew Kurushin <ajax16384@gmail.com> | 2022-08-02 21:27:29 +0300 |
|---|---|---|
| committer | Mizux <mizux.dev@gmail.com> | 2022-08-04 22:54:23 +0300 |
| commit | cbc8f9c7a37db9169f8c361fba42b7eace7fdc3d (patch) | |
| tree | 4eabef037b01f2554d5619c7f90258c42f085249 | |
| parent | 6d62f2fa649d1f1522f4062475b6c9279f9ef159 (diff) | |
add Lakefield
| -rw-r--r-- | src/impl_x86__base_implementation.inl | 1 | ||||
| -rw-r--r-- | test/cpuinfo_x86_test.cc | 22 |
2 files changed, 19 insertions, 4 deletions
diff --git a/src/impl_x86__base_implementation.inl b/src/impl_x86__base_implementation.inl index 63db6ff..b719a64 100644 --- a/src/impl_x86__base_implementation.inl +++ b/src/impl_x86__base_implementation.inl @@ -465,6 +465,7 @@ X86Microarchitecture GetX86Microarchitecture(const X86Info* info) { case CPUID(0x06, 0x5C): // https://en.wikipedia.org/wiki/Goldmont return INTEL_ATOM_GMT; + case CPUID(0x06, 0x8A): case CPUID(0x06, 0x96): case CPUID(0x06, 0x9C): // https://en.wikichip.org/wiki/intel/microarchitectures/tremont diff --git a/test/cpuinfo_x86_test.cc b/test/cpuinfo_x86_test.cc index 7bcc24e..2e34d12 100644 --- a/test/cpuinfo_x86_test.cc +++ b/test/cpuinfo_x86_test.cc @@ -1172,17 +1172,17 @@ TEST_F(CpuidX86Test, INTEL_CML_H) { EXPECT_EQ(GetX86Microarchitecture(&info), X86Microarchitecture::INTEL_CML); } -// https://github.com/InstLatx64/InstLatx64/blob/master/GenuineIntel/GenuineIntel00906C0_JasperLake_01_CPUID.txt -TEST_F(CpuidX86Test, INTEL_ATOM_TMT_JASPER_LAKE) { +// http://users.atw.hu/instlatx64/GenuineIntel/GenuineIntel00806A1_Lakefield_CPUID.txt +TEST_F(CpuidX86Test, INTEL_ATOM_TMT_LAKEFIELD) { cpu().SetLeaves({ {{0x00000000, 0}, Leaf{0x0000001B, 0x756E6547, 0x6C65746E, 0x49656E69}}, - {{0x00000001, 0}, Leaf{0x000906C0, 0x00800800, 0x4FF8EBBF, 0xBFEBFBFF}}, + {{0x00000001, 0}, Leaf{0x000806A1, 0x00100800, 0x4FD8EBBF, 0xBFEBFBFF}}, }); const auto info = GetX86Info(); EXPECT_STREQ(info.vendor, "GenuineIntel"); EXPECT_EQ(info.family, 0x06); - EXPECT_EQ(info.model, 0x9C); + EXPECT_EQ(info.model, 0x8A); EXPECT_EQ(GetX86Microarchitecture(&info), X86Microarchitecture::INTEL_ATOM_TMT); } @@ -1200,6 +1200,20 @@ TEST_F(CpuidX86Test, INTEL_ATOM_TMT_ELKHART_LAKE) { EXPECT_EQ(GetX86Microarchitecture(&info), X86Microarchitecture::INTEL_ATOM_TMT); } +// https://github.com/InstLatx64/InstLatx64/blob/master/GenuineIntel/GenuineIntel00906C0_JasperLake_01_CPUID.txt +TEST_F(CpuidX86Test, INTEL_ATOM_TMT_JASPER_LAKE) { + cpu().SetLeaves({ + {{0x00000000, 0}, Leaf{0x0000001B, 0x756E6547, 0x6C65746E, 0x49656E69}}, + {{0x00000001, 0}, Leaf{0x000906C0, 0x00800800, 0x4FF8EBBF, 0xBFEBFBFF}}, + }); + const auto info = GetX86Info(); + + EXPECT_STREQ(info.vendor, "GenuineIntel"); + EXPECT_EQ(info.family, 0x06); + EXPECT_EQ(info.model, 0x9C); + EXPECT_EQ(GetX86Microarchitecture(&info), X86Microarchitecture::INTEL_ATOM_TMT); +} + // http://users.atw.hu/instlatx64/GenuineIntel/GenuineIntel00306F2_HaswellEP2_CPUID.txt TEST_F(CpuidX86Test, INTEL_HASWELL_LZCNT) { cpu().SetLeaves({ |