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authorCraig Topper <craig.topper@sifive.com>2022-11-13 22:34:06 +0300
committerCraig Topper <craig.topper@sifive.com>2022-11-13 22:34:14 +0300
commit9e14ffa444cdef7ab6fbebb0a4e61474d3f5df09 (patch)
tree33df5e57f24c567bc3ac999c48fa3535aa540460
parent1b99e8ba487bb2759c81ecd925b709830bdd7aa9 (diff)
[RISCV] Add PACK/PACKH/PACKW to hasAllWUsers in RISCVSExtWRemoval.
-rw-r--r--llvm/lib/Target/RISCV/RISCVSExtWRemoval.cpp3
1 files changed, 3 insertions, 0 deletions
diff --git a/llvm/lib/Target/RISCV/RISCVSExtWRemoval.cpp b/llvm/lib/Target/RISCV/RISCVSExtWRemoval.cpp
index d2e23a172b01..169d1866df58 100644
--- a/llvm/lib/Target/RISCV/RISCVSExtWRemoval.cpp
+++ b/llvm/lib/Target/RISCV/RISCVSExtWRemoval.cpp
@@ -118,6 +118,9 @@ static bool hasAllWUsers(const MachineInstr &OrigMI, MachineRegisterInfo &MRI) {
case RISCV::SEXT_B:
case RISCV::SEXT_H:
case RISCV::ZEXT_H_RV64:
+ case RISCV::PACK:
+ case RISCV::PACKH:
+ case RISCV::PACKW:
break;
// these overwrite higher input bits, otherwise the lower word of output