Welcome to mirror list, hosted at ThFree Co, Russian Federation.

github.com/llvm/llvm-project.git - Unnamed repository; edit this file 'description' to name the repository.
summaryrefslogtreecommitdiff
path: root/mlir
diff options
context:
space:
mode:
authorMin-Yih Hsu <minyihh@uci.edu>2022-04-21 05:57:32 +0300
committerMin-Yih Hsu <minyihh@uci.edu>2022-05-15 01:14:40 +0300
commit3da65c4c0b00b9fc0cf2db77c18a58bc6fca251f (patch)
treed6d702bfa45d0c02696913f6246439083bd69401 /mlir
parentb8f52c08f85aac47cb2079a7a80a9d88875e0692 (diff)
[mlir][LLVMIR] Add support for translating shufflevector
Add support for translating llvm::ShuffleVectorInst Differential Revision: https://reviews.llvm.org/D125030
Diffstat (limited to 'mlir')
-rw-r--r--mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp16
-rw-r--r--mlir/test/Target/LLVMIR/Import/basic.ll11
2 files changed, 26 insertions, 1 deletions
diff --git a/mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp b/mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp
index 00f850c5278a..124d82b3f78c 100644
--- a/mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp
+++ b/mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp
@@ -618,7 +618,7 @@ static StringRef lookupOperationNameFromOpcode(unsigned opcode) {
// FIXME: vaarg
// FIXME: extractelement
// FIXME: insertelement
- // FIXME: shufflevector
+ // ShuffleVector is handled specially.
// InsertValue is handled specially.
// ExtractValue is handled specially.
// FIXME: landingpad
@@ -1066,6 +1066,20 @@ LogicalResult Importer::processInstruction(llvm::Instruction *inst) {
instMap[inst] = b.create<ExtractValueOp>(loc, type, aggOperand, indices);
return success();
}
+ case llvm::Instruction::ShuffleVector: {
+ auto *svInst = cast<llvm::ShuffleVectorInst>(inst);
+ Value vec1 = processValue(svInst->getOperand(0));
+ if (!vec1)
+ return failure();
+ Value vec2 = processValue(svInst->getOperand(1));
+ if (!vec2)
+ return failure();
+
+ ArrayAttr mask = b.getI32ArrayAttr(svInst->getShuffleMask());
+
+ instMap[inst] = b.create<ShuffleVectorOp>(loc, vec1, vec2, mask);
+ return success();
+ }
}
}
diff --git a/mlir/test/Target/LLVMIR/Import/basic.ll b/mlir/test/Target/LLVMIR/Import/basic.ll
index d5a766738803..24810ac7732b 100644
--- a/mlir/test/Target/LLVMIR/Import/basic.ll
+++ b/mlir/test/Target/LLVMIR/Import/basic.ll
@@ -572,3 +572,14 @@ define void @insert_extract_value_array([4 x [4 x i8]] %x1) {
ret void
}
+; Shufflevector
+; CHECK-LABEL: llvm.func @shuffle_vec
+define <4 x half> @shuffle_vec(<4 x half>* %arg0, <4 x half>* %arg1) {
+ ; CHECK: %[[V0:.+]] = llvm.load %{{.+}} : !llvm.ptr<vector<4xf16>>
+ %val0 = load <4 x half>, <4 x half>* %arg0
+ ; CHECK: %[[V1:.+]] = llvm.load %{{.+}} : !llvm.ptr<vector<4xf16>>
+ %val1 = load <4 x half>, <4 x half>* %arg1
+ ; CHECK: llvm.shufflevector %[[V0]], %[[V1]] [2 : i32, 3 : i32, -1 : i32, -1 : i32] : vector<4xf16>, vector<4xf16>
+ %shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef>
+ ret <4 x half> %shuffle
+}