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| author | David Green <david.green@arm.com> | 2022-10-11 00:06:35 +0300 |
|---|---|---|
| committer | David Green <david.green@arm.com> | 2022-10-11 00:06:35 +0300 |
| commit | deb8f8ab17c5dfc17bd405292ada353e1140665f (patch) | |
| tree | b8db5813df35fe82db880f5666b1644b6ad8124c /mlir | |
| parent | 52b8f3a80c6b2b1efcd91e2278bd9d63a0b1567b (diff) | |
[ARM] Add errors for MVE exclusive registers.
These instructions already had errors for operands that could not share
the same register:
VCMUL, VMULL, VQDMULL.
This extends that to a few others:
VREV64, VQDMULLqr, VCADD and VHCADD.
Only the i32 types require the error.
Differential Revision: https://reviews.llvm.org/D135560
Diffstat (limited to 'mlir')
0 files changed, 0 insertions, 0 deletions