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author | Brian Cain <bcain@quicinc.com> | 2020-01-17 21:18:59 +0300 |
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committer | Krzysztof Parzyszek <kparzysz@quicinc.com> | 2020-01-17 21:22:07 +0300 |
commit | c1873631d0a8f2acca4ab428a1e9abea844d97ff (patch) | |
tree | 5d23ead0262c78d55c07a5ce2411d0fcc656d4c2 /test | |
parent | 8fb29d4a507371224ee06a039f1c01e242099967 (diff) |
[Hexagon] Refactor HexagonShuffle
The check() in HexagonShuffle has been decomposed into smaller steps.
No functionality change is intended with this commit.
Diffstat (limited to 'test')
-rw-r--r-- | test/MC/Hexagon/PacketRules/restrict_slot1_aok.s | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/test/MC/Hexagon/PacketRules/restrict_slot1_aok.s b/test/MC/Hexagon/PacketRules/restrict_slot1_aok.s new file mode 100644 index 000000000000..97b4d5606387 --- /dev/null +++ b/test/MC/Hexagon/PacketRules/restrict_slot1_aok.s @@ -0,0 +1,9 @@ +# RUN: not llvm-mc -filetype=asm %s 2>&1 | FileCheck %s + +{ r0=sub(#1,r0) + r1=sub(#1, r0) + r2=memw(r0) + dczeroa(r0) } +# CHECK: 5:3: note: Instruction was restricted from being in slot 1 +# CHECK: 6:3: note: Instruction can only be combined with an ALU instruction in slot 1 +# CHECK: 6:15: error: invalid instruction packet: slot error |