diff options
| author | Underground78 <underground78@users.sourceforge.net> | 2013-02-08 02:04:53 +0400 |
|---|---|---|
| committer | Underground78 <underground78@users.sourceforge.net> | 2013-02-10 19:55:13 +0400 |
| commit | 65fa098858007642cffcf547b64cbf403ba2124b (patch) | |
| tree | 93fa8fa3e551d3fc4e75c3b31042dae8e2348321 /src/filters/transform/MPCVideoDec | |
| parent | d88ae461a04baab8ba560e7db009d6565843d250 (diff) | |
Update CpuId to detect SSE4/4.2 and AVX support.
Diffstat (limited to 'src/filters/transform/MPCVideoDec')
| -rw-r--r-- | src/filters/transform/MPCVideoDec/CpuId.cpp | 19 | ||||
| -rw-r--r-- | src/filters/transform/MPCVideoDec/CpuId.h | 7 |
2 files changed, 22 insertions, 4 deletions
diff --git a/src/filters/transform/MPCVideoDec/CpuId.cpp b/src/filters/transform/MPCVideoDec/CpuId.cpp index 5318e632a..5c10d7ed4 100644 --- a/src/filters/transform/MPCVideoDec/CpuId.cpp +++ b/src/filters/transform/MPCVideoDec/CpuId.cpp @@ -1,5 +1,5 @@ /*
- * (C) 2007-2012 see Authors.txt
+ * (C) 2007-2013 see Authors.txt
*
* This file is part of MPC-HC.
*
@@ -26,6 +26,9 @@ #define CPUID_SSE (1 << 25)
#define CPUID_SSE2 (1 << 26)
#define CPUID_SSE3 (1 << 0)
+#define CPUID_SSE41 (1 << 19)
+#define CPUID_SSE42 (1 << 20)
+#define CPUID_AVX ((1 << 27) | (1 << 28))
// Intel specific
#define CPUID_SSSE3 (1 << 9)
@@ -34,7 +37,6 @@ #define CPUID_3DNOW (1 << 31)
#define CPUID_MMXEXT (1 << 22)
-
CCpuId::CCpuId()
{
unsigned nHighestFeature;
@@ -78,12 +80,25 @@ CCpuId::CCpuId() if (nBuff[2] & CPUID_SSE3) {
m_nCPUFeatures |= MPC_MM_SSE3;
}
+ if (nBuff[2] & CPUID_SSE41) {
+ m_nCPUFeatures |= MPC_MM_SSE4;
+ }
+ if (nBuff[2] & CPUID_SSE42) {
+ m_nCPUFeatures |= MPC_MM_SSE42;
+ }
// Intel specific
if (m_nType == PROCESSOR_INTEL) {
if (nBuff[2] & CPUID_SSSE3) {
m_nCPUFeatures |= MPC_MM_SSSE3;
}
+ if ((nBuff[2] & CPUID_AVX) == CPUID_AVX) {
+ // Check for OS support
+ unsigned long long xcrFeatureMask = _xgetbv(_XCR_XFEATURE_ENABLED_MASK);
+ if ((xcrFeatureMask & 0x6) == 0x6) {
+ m_nCPUFeatures |= MPC_MM_AVX;
+ }
+ }
}
}
diff --git a/src/filters/transform/MPCVideoDec/CpuId.h b/src/filters/transform/MPCVideoDec/CpuId.h index 9fab03d51..54ed12cfe 100644 --- a/src/filters/transform/MPCVideoDec/CpuId.h +++ b/src/filters/transform/MPCVideoDec/CpuId.h @@ -1,5 +1,5 @@ /*
- * (C) 2007-2012 see Authors.txt
+ * (C) 2007-2013 see Authors.txt
*
* This file is part of MPC-HC.
*
@@ -38,7 +38,10 @@ public: MPC_MM_SSE = 0x0008, /* SSE functions */
MPC_MM_SSE2 = 0x0010, /* PIV SSE2 functions */
MPC_MM_SSE3 = 0x0040, /* AMD64 & PIV SSE3 functions */
- MPC_MM_SSSE3 = 0x0080 /* PIV Core 2 SSSE3 functions */
+ MPC_MM_SSSE3 = 0x0080, /* PIV Core 2 SSSE3 functions */
+ MPC_MM_SSE4 = 0x0100,
+ MPC_MM_SSE42 = 0x0200,
+ MPC_MM_AVX = 0x4000
} PROCESSOR_FEATURES;
CCpuId();
|