MISC: Remove deprecatedrelease/v.2.0.0_01.06.2019

4 files changed, 0 insertions, 2150 deletions

diff --git a/sdio_ext.cpp b/sdio_ext.cpp
deleted file mode 100644
index dda9d3b..0000000
--- a/sdio_ext.cpp
+++ /dev/null
@@ -1,59 +0,0 @@
-#include "sdio_ext.h"
-
-namespace SDIO_CPP_Extension {
-
-namespace cfg = config;
-
-void SDIO_ext::_init()
-{
-	_init_rcc();
-	_init_gpio();
-}
-
-void SDIO_ext::_init_rcc()
-{
-	rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_SDIOEN);
-
-	rcc_periph_clock_enable(cfg::RCC_PERIPH_DATA_CLK);
-	rcc_periph_clock_enable(cfg::RCC_PERIPH_CMD);
-}
-
-void SDIO_ext::_init_gpio()
-{
-    // Pin mappings for STM32F217.
-    // PC8  - SDIO_D0
-    // PC9  - SDIO_D1
-    // PC10 - SDIO_D2
-    // PC11 - SDIO_D3
-    // PC12 - SDIO_CK
-    // PD2  - SDIO_CMD
-
-	// Data pins
-	gpio::GPIO_ext data_pins[cfg::COUNT_OF_DATA_PINS];
-	for (int i = 0; i < cfg::COUNT_OF_DATA_PINS; ++i) {
-		data_pins[i].init(cfg::DATA_PINS[i]);
-		data_pins[i].mode_setup(gpio::Mode::ALTERNATE_FUNCTION,
-							    gpio::PullMode::NO_PULL);
-		data_pins[i].set_output_options(gpio::OutputType::PUSH_PULL,
-									    gpio::Speed::FAST_50MHz);
-		data_pins[i].set_af(cfg::SDIO_ALTERNATIVE_FUNC_NUMBER);
-	}
-
-	// Command pin
-	gpio::GPIO_ext cmd_pin(cfg::CMD_PIN);
-	cmd_pin.mode_setup(gpio::Mode::ALTERNATE_FUNCTION,
-					   gpio::PullMode::NO_PULL);
-	cmd_pin.set_output_options(gpio::OutputType::PUSH_PULL,
-							   gpio::Speed::FAST_50MHz);
-	cmd_pin.set_af(cfg::SDIO_ALTERNATIVE_FUNC_NUMBER);
-
-	// Clock pin
-	gpio::GPIO_ext clk_pin(cfg::CLK_PIN);
-	clk_pin.mode_setup(gpio::Mode::ALTERNATE_FUNCTION,
-					   gpio::PullMode::NO_PULL);
-	clk_pin.set_output_options(gpio::OutputType::PUSH_PULL,
-							   gpio::Speed::FAST_50MHz);
-	clk_pin.set_af(cfg::SDIO_ALTERNATIVE_FUNC_NUMBER);
-}
-
-} /* namespace hw */
diff --git a/systick_ext.cpp b/systick_ext.cpp
deleted file mode 100644
index a3bab35..0000000
--- a/systick_ext.cpp
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * This file is part of the libopencm3_cpp_extensions project.
- * hosted at http://github.com/thirdpin/libopencm3_cpp_extensions
- *
- * Copyright (C) 2016  Third Pin LLC
- * Written by Anastasiia Lazareva <a.lazareva@thirdpin.ru>
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-/* 
-SYSTICK implementation, public interface
-*/
-
-#include "systick_ext.h"
-#if ENABLE_CUSTOM_SYSTICK_SOURCE == 1
-extern "C" {
-    void SYS_TICK_INT_FUNC(void);
-}
-#include "libopencm3/stm32/timer.h"
-#endif
-
-volatile uint32_t counter_ms;
-
-void sys_tick_handler(void)
-{
-#if ENABLE_CUSTOM_SYSTICK_SOURCE == 1
-    if (timer_get_flag(INT_SOURCE, TIM_SR_UIF)) {
-        timer_clear_flag(INT_SOURCE, TIM_SR_UIF);
-        counter_ms++;
-    }
-#else
-    counter_ms++;
-#endif
-}
-
-void delay_nop(uint32_t count)
-{
-	while(count--) {
-		__asm("nop");
-	}
-}
-
-void delay_ms(uint32_t ms)
-{
-	uint32_t time = counter_ms;
-	while((counter_ms - time) < ms);
-}
-
-//by default sets up a timer to create 1ms ticks (div = 1000)
-//at system clock 120mhz.
-void systick_init(uint32_t div)
-{
-	counter_ms = 0;
-	systick_set_reload(SYSTEM_CORE_CLOCK / div);
-	systick_set_clocksource(STK_CSR_CLKSOURCE_AHB);
-	systick_counter_enable();
-	systick_interrupt_enable();
-}
-
-uint32_t get_counter_ms()
-{
-	return counter_ms;
-}
-
-TimerMs::TimerMs(TimerMode mode, uint32_t period_ms)
-{
-	_mode = mode;
-	_saved_ms = get_counter_ms();
-	_period_ms = period_ms;
-
-	switch (_mode)
-	{
-		case CYCLE:
-			_is_active = true;
-			break;
-		case ONE_SHOT:
-			_is_active = false;
-			break;
-	}
-}
-
-bool TimerMs::timeout()
-{
-	if (_is_active && ((counter_ms - _saved_ms) >= _period_ms)) {
-		switch (_mode)
-		{
-			case CYCLE:
-				_saved_ms = counter_ms;
-				return true;
-			case ONE_SHOT:
-				return true;
-		}
-	}
-
-	return false;
-}
-
-bool TimerMs::start()
-{
-	if(_mode == CYCLE)
-		return false;
-	_saved_ms = counter_ms;
-	_is_active = true;
-	return true;
-}
-
-bool TimerMs::stop()
-{
-	if(_mode == CYCLE)
-		return false;
-	_is_active = false;
-	return true;
-}
diff --git a/timer_ext.cpp b/timer_ext.cpp
deleted file mode 100644
index 266bcd1..0000000
--- a/timer_ext.cpp
+++ /dev/null
@@ -1,1624 +0,0 @@
-/*
- * This file is part of the libopencm3_cpp_extensions project.
- * hosted at http://github.com/thirdpin/libopencm3_cpp_extensions
- *
- * Copyright (C) 2016  Third Pin LLC
- * Written by Anastasiia Lazareva <a.lazareva@thirdpin.ru>
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-/* 
-TIM C++ Wrapper of libopencm3 library for STM32F2, STM32F4 
-*/
-
-#include "timer_ext.h"
-using namespace TIMER_CPP_Extension;
-
-//1,2,3,4,5,6,7,8,9,10,11,12,13,14
-Result TIMER_ext::enable_counter()
-{
-	TIM_CR1(_timer) |= TIM_CR1_CEN;
-	return OK;
-}
-//1,2,3,4,5,6,7,8,9,10,11,12,13,14
-Result TIMER_ext::disable_counter()
-{
-	TIM_CR1(_timer) &= ~TIM_CR1_CEN;
-	return OK;
-}
-//1,2,3,4,5,6,7,8,9,10,11,12,13,14
-Result TIMER_ext::enable_update_event_generation()
-{
-	TIM_CR1(_timer) &= ~TIM_CR1_UDIS;
-	return OK;
-}
-//1,2,3,4,5,6,7,8,9,10,11,12,13,14
-Result TIMER_ext::disable_update_event_generation()
-{
-	TIM_CR1(_timer) |= TIM_CR1_UDIS;
-	return OK;
-}
-//1,2,3,4,5,6,7,8,9,10,11,12,13,14
-Result TIMER_ext::set_update_event_source(UEV_Source source)
-{
-	switch (source)
-	{
-		case COUNTER_OVERFLOW_AND_UG:
-			TIM_CR1(_timer) &= ~TIM_CR1_URS;
-			break;
-		case COUNTER_OVERFLOW:
-			TIM_CR1(_timer) |= TIM_CR1_URS;
-			break;
-	}
-
-	return OK;
-}
-//1,2,3,4,5,6,7,8,9,10,11,12,13,14
-Result TIMER_ext::set_counter_mode(CounterMode mode)
-{
-	switch (mode)
-	{
-		case ONE_SHOT:
-			TIM_CR1(_timer) |= TIM_CR1_OPM;
-			break;
-		case CONTINUOUS:
-			TIM_CR1(_timer) &= ~TIM_CR1_OPM;
-			break;
-	}
-
-	return OK;
-}
-//1,2,3,4,5,8
-Result TIMER_ext::set_counter_direction(CounterDirection dir)
-{
-	if((_timer != TIM1) && (_timer != TIM2) &&
-	   (_timer != TIM3) && (_timer != TIM4) &&
-	   (_timer != TIM5) && (_timer != TIM8)) {
-		return NOT_SUPPORTED;
-	}
-
-	switch (dir)
-	{
-		case UP:
-			TIM_CR1(_timer) &= ~TIM_CR1_DIR_DOWN;
-			break;
-		case DOWN:
-			TIM_CR1(_timer) |= TIM_CR1_DIR_DOWN;
-			break;
-	}
-
-	return OK;
-}
-//1,2,3,4,5,8
-Result TIMER_ext::set_alignment(Alignment alignment)
-{
-	if((_timer != TIM1) && (_timer != TIM2) &&
-	   (_timer != TIM3) && (_timer != TIM4) &&
-	   (_timer != TIM5) && (_timer != TIM8)) {
-		return NOT_SUPPORTED;
-	}
-
-	bool counter_enable = TIM_CR1(_timer) & TIM_CR1_CEN;
-
-	switch (alignment)
-	{
-		case EDGE:
-			TIM_CR1(_timer) = (TIM_CR1(_timer) & ~TIM_CR1_CMS_MASK) |
-			                   TIM_CR1_CMS_EDGE ;
-			return OK;
-		case CENTER_DOWN:
-			if (counter_enable) {
-				return USAGE_ERROR;
-			}
-			TIM_CR1(_timer) = (TIM_CR1(_timer) & ~TIM_CR1_CMS_MASK) |
-							   TIM_CR1_CMS_CENTER_1;
-			return OK;
-		case CENTER_UP:
-			if (counter_enable) {
-				return USAGE_ERROR;
-			}
-			TIM_CR1(_timer) = (TIM_CR1(_timer) & ~TIM_CR1_CMS_MASK) |
-			                   TIM_CR1_CMS_CENTER_2 ;
-			return OK;
-		case CENTER_UP_DOWN:
-			if (counter_enable) {
-				return USAGE_ERROR;
-			}
-			TIM_CR1(_timer) = (TIM_CR1(_timer) & ~TIM_CR1_CMS_MASK) |
-			                   TIM_CR1_CMS_CENTER_3 ;
-			return OK;
-	}
-
-	return NOT_SUPPORTED;
-}
-//1,2,3,4,5,6,7,8,9,10,11,12,13,14
-Result TIMER_ext::enable_autoreload_preload()
-{
-	TIM_CR1(_timer) |= TIM_CR1_ARPE;
-	return OK;
-}
-//1,2,3,4,5,6,7,8,9,10,11,12,13,14
-Result TIMER_ext::disable_autoreload_preload()
-{
-	TIM_CR1(_timer) &= ~TIM_CR1_ARPE;
-	return OK;
-}
-//1,2,3,4,5,8,9,10,11,12,13,14
-Result TIMER_ext::set_clock_division(ClockDivision div)
-{
-	if((_timer == TIM6) || (_timer == TIM7)) {
-		return USAGE_ERROR;
-	}
-
-	switch (div)
-	{
-		case TIMER_CLOCK_MUL_1:
-			TIM_CR1(_timer) = (TIM_CR1(_timer) & ~TIM_CR1_CKD_CK_INT_MASK) |
-			                   TIM_CR1_CKD_CK_INT ;
-			break;
-		case TIMER_CLOCK_MUL_2:
-			TIM_CR1(_timer) = (TIM_CR1(_timer) & ~TIM_CR1_CKD_CK_INT_MASK) |
-			                   TIM_CR1_CKD_CK_INT_MUL_2 ;
-			break;
-		case TIMER_CLOCK_MUL_4:
-			TIM_CR1(_timer) = (TIM_CR1(_timer) & ~TIM_CR1_CKD_CK_INT_MASK) |
-			                   TIM_CR1_CKD_CK_INT_MUL_4 ;
-			break;
-	}
-
-	return OK;
-}
-//9,12
-Result TIMER_ext::set_master_mode(MasterMode mode)
-{
-	switch (mode)
-	{
-		case MASTER_RESET:
-			TIM_CR2(_timer) = (TIM_CR2(_timer) & ~TIM_CR2_MMS_MASK) |
-			                   TIM_CR2_MMS_RESET ;
-			break;
-		case ENABLE:
-			TIM_CR2(_timer) = (TIM_CR2(_timer) & ~TIM_CR2_MMS_MASK) |
-			                   TIM_CR2_MMS_ENABLE ;
-			break;
-		case UPDATE:
-			TIM_CR2(_timer) = (TIM_CR2(_timer) & ~TIM_CR2_MMS_MASK) |
-			                   TIM_CR2_MMS_UPDATE ;
-			break;
-		case COMPARE_PULSE:
-			TIM_CR2(_timer) = (TIM_CR2(_timer) & ~TIM_CR2_MMS_MASK) |
-			                   TIM_CR2_MMS_COMPARE_PULSE ;
-			break;
-		case COMPARE_OC1REF:
-			TIM_CR2(_timer) = (TIM_CR2(_timer) & ~TIM_CR2_MMS_MASK) |
-			                   TIM_CR2_MMS_COMPARE_OC1REF ;
-			break;
-		case COMPARE_OC2REF:
-			TIM_CR2(_timer) = (TIM_CR2(_timer) & ~TIM_CR2_MMS_MASK) |
-			                   TIM_CR2_MMS_COMPARE_OC2REF ;
-			break;
-	}
-
-	return OK;
-}
-//9,12
-Result TIMER_ext::set_slave_mode(SlaveMode mode)
-{
-	switch (mode)
-	{
-	    case DISABLED:
-			TIM_SMCR(_timer) = (TIM_SMCR(_timer) & ~TIM_SMCR_SMS_MASK) |
-			                    TIM_SMCR_SMS_OFF ;
-			break;
-		case SLAVE_RESET:
-			TIM_SMCR(_timer) = (TIM_SMCR(_timer) & ~TIM_SMCR_SMS_MASK) |
-			                    TIM_SMCR_SMS_RM ;
-			break;
-		case GATED:
-			if(TIM_SMCR(_timer) & TIM_SMCR_TS_TI1F_ED) {
-				return USAGE_ERROR;
-			}
-			TIM_SMCR(_timer) = (TIM_SMCR(_timer) & ~TIM_SMCR_SMS_MASK) |
-			                    TIM_SMCR_SMS_GM ;
-			break;
-		case TRIGGER:
-			TIM_SMCR(_timer) = (TIM_SMCR(_timer) & ~TIM_SMCR_SMS_MASK) |
-			                    TIM_SMCR_SMS_TM ;
-			break;
-		case EXTERNAL_CLOCK:
-			TIM_SMCR(_timer) = (TIM_SMCR(_timer) & ~TIM_SMCR_SMS_MASK) |
-			                    TIM_SMCR_SMS_ECM1 ;
-			break;
-	}
-
-	return OK;
-}
-//9,12
-Result TIMER_ext::set_trigger(Trigger trigger)
-{
-	switch (trigger)
-		{
-		    case INTERNAL_TRIGGER_0:
-				TIM_SMCR(_timer) = (TIM_SMCR(_timer) & ~TIM_SMCR_TS_MASK) |
-				                    TIM_SMCR_TS_ITR0 ;
-				break;
-			case INTERNAL_TRIGGER_1:
-				TIM_SMCR(_timer) = (TIM_SMCR(_timer) & ~TIM_SMCR_TS_MASK) |
-				                    TIM_SMCR_TS_ITR1 ;
-				break;
-			case INTERNAL_TRIGGER_2:
-				TIM_SMCR(_timer) = (TIM_SMCR(_timer) & ~TIM_SMCR_TS_MASK) |
-				                    TIM_SMCR_TS_ITR2 ;
-				break;
-			case INTERNAL_TRIGGER_3:
-				TIM_SMCR(_timer) = (TIM_SMCR(_timer) & ~TIM_SMCR_TS_MASK) |
-				                    TIM_SMCR_TS_ITR3 ;
-				break;
-			case EDGE_DETECTOR:
-				TIM_SMCR(_timer) = (TIM_SMCR(_timer) & ~TIM_SMCR_TS_MASK) |
-				                    TIM_SMCR_TS_TI1F_ED ;
-				break;
-			case FILTERED_TIMER_INPUT_1:
-				TIM_SMCR(_timer) = (TIM_SMCR(_timer) & ~TIM_SMCR_TS_MASK) |
-				                    TIM_SMCR_TS_TI1FP1 ;
-				break;
-			case FILTERED_TIMER_INPUT_2:
-				TIM_SMCR(_timer) = (TIM_SMCR(_timer) & ~TIM_SMCR_TS_MASK) |
-				                    TIM_SMCR_TS_TI2FP2 ;
-				break;
-		}
-
-		return OK;
-}
-//9,12
-Result TIMER_ext::enable_master_slave_mode()
-{
-	TIM_SMCR(_timer) |= TIM_SMCR_MSM;
-	return OK;
-}
-//9,12
-Result TIMER_ext::disable_master_slave_mode()
-{
-	TIM_SMCR(_timer) &= ~TIM_SMCR_MSM;
-	return OK;
-}
-//9,12
-Result TIMER_ext::enable_update_interrupt()
-{
-	TIM_DIER(_timer) |= TIM_DIER_UIE;
-	return OK;
-}
-//9,12
-Result TIMER_ext::disable_update_interrupt()
-{
-	TIM_DIER(_timer) &= ~TIM_DIER_UIE;
-	return OK;
-}
-//9,12
-Result TIMER_ext::enable_capture_compare_1_interrupt()
-{
-	TIM_DIER(_timer) |= TIM_DIER_CC1IE;
-	return OK;
-}
-//9,12
-Result TIMER_ext::disable_capture_compare_1_interrupt()
-{
-	TIM_DIER(_timer) &= ~TIM_DIER_CC1IE;
-	return OK;
-}
-//9,12
-Result TIMER_ext::enable_capture_compare_2_interrupt()
-{
-	TIM_DIER(_timer) |= TIM_DIER_CC2IE;
-	return OK;
-}
-//9,12
-Result TIMER_ext::disable_capture_compare_2_interrupt()
-{
-	TIM_DIER(_timer) &= ~TIM_DIER_CC2IE;
-	return OK;
-}
-Result TIMER_ext::enable_capture_compare_3_interrupt()
-{
-	TIM_DIER(_timer) |= TIM_DIER_CC3IE;
-	return OK;
-}
-//9,12
-Result TIMER_ext::disable_capture_compare_3_interrupt()
-{
-	TIM_DIER(_timer) &= ~TIM_DIER_CC3IE;
-	return OK;
-}
-//9,12
-Result TIMER_ext::enable_capture_compare_4_interrupt()
-{
-	TIM_DIER(_timer) |= TIM_DIER_CC4IE;
-	return OK;
-}
-//9,12
-Result TIMER_ext::disable_capture_compare_4_interrupt()
-{
-	TIM_DIER(_timer) &= ~TIM_DIER_CC4IE;
-	return OK;
-}
-//9,12
-Result TIMER_ext::enable_trigger_interrupt()
-{
-	TIM_DIER(_timer) |= TIM_DIER_TIE;
-	return OK;
-}
-//9,12
-Result TIMER_ext::disable_trigger_interrupt()
-{
-	TIM_DIER(_timer) &= ~TIM_DIER_TIE;
-	return OK;
-}
-//9,12
-bool TIMER_ext::get_flag_status(Flag flag)
-{
-	bool status = false;
-
-	switch (flag)
-	{
-		case UPDATE_INTERRUPT:
-			status = TIM_SR(_timer) & TIM_SR_UIF;
-			break;
-		case CAPTURE_COMPARE_1_INTERRUPT:
-			status = TIM_SR(_timer) & TIM_SR_CC1IF;
-			break;
-		case CAPTURE_COMPARE_2_INTERRUPT:
-			status = TIM_SR(_timer) & TIM_SR_CC2IF;
-			break;
-		case CAPTURE_COMPARE_3_INTERRUPT:
-			status = TIM_SR(_timer) & TIM_SR_CC3IF;
-			break;
-		case CAPTURE_COMPARE_4_INTERRUPT:
-			status = TIM_SR(_timer) & TIM_SR_CC4IF;
-			break;
-		case TRIGGER_INTERRUPT:
-			status = TIM_SR(_timer) & TIM_SR_TIF;
-			break;
-		case CAPTURE_COMPARE_1_OVERCAPTURE:
-			status = TIM_SR(_timer) & TIM_SR_CC1OF;
-			break;
-		case CAPTURE_COMPARE_2_OVERCAPTURE:
-			status = TIM_SR(_timer) & TIM_SR_CC2OF;
-			break;
-		case CAPTURE_COMPARE_3_OVERCAPTURE:
-			status = TIM_SR(_timer) & TIM_SR_CC3OF;
-			break;
-		case CAPTURE_COMPARE_4_OVERCAPTURE:
-			status = TIM_SR(_timer) & TIM_SR_CC4OF;
-			break;
-	}
-
-	return status;
-}
-//9,12
-Result TIMER_ext::clear_flag_status(Flag flag)
-{
-	switch (flag)
-	{
-		case UPDATE_INTERRUPT:
-			TIM_SR(_timer) &= ~TIM_SR_UIF;
-			break;
-		case CAPTURE_COMPARE_1_INTERRUPT:
-			TIM_SR(_timer) &= ~TIM_SR_CC1IF;
-			break;
-		case CAPTURE_COMPARE_2_INTERRUPT:
-			TIM_SR(_timer) &= ~TIM_SR_CC2IF;
-			break;
-		case CAPTURE_COMPARE_3_INTERRUPT:
-			TIM_SR(_timer) &= ~TIM_SR_CC3IF;
-			break;
-		case CAPTURE_COMPARE_4_INTERRUPT:
-			TIM_SR(_timer) &= ~TIM_SR_CC4IF;
-			break;
-		case TRIGGER_INTERRUPT:
-			TIM_SR(_timer) &= ~TIM_SR_TIF;
-			break;
-		case CAPTURE_COMPARE_1_OVERCAPTURE:
-			TIM_SR(_timer) &= ~TIM_SR_CC1OF;
-			break;
-		case CAPTURE_COMPARE_2_OVERCAPTURE:
-			TIM_SR(_timer) &= ~TIM_SR_CC2OF;
-			break;
-		case CAPTURE_COMPARE_3_OVERCAPTURE:
-			TIM_SR(_timer) &= ~TIM_SR_CC3OF;
-			break;
-		case CAPTURE_COMPARE_4_OVERCAPTURE:
-			TIM_SR(_timer) &= ~TIM_SR_CC4OF;
-			break;
-	}
-
-	return OK;
-}
-void TIMER_ext::update_generation()
-{
-	TIM_EGR(_timer) |= TIM_EGR_UG;
-}
-//9,12
-Result TIMER_ext::set_capture_compare_1_mode(CC_Mode mode)
-{
-	bool channel_on = TIM_CCER(_timer) & TIM_CCER_CC1E;
-
-	if (channel_on) {
-		return USAGE_ERROR;
-	}
-
-	switch (mode)
-	{
-		case OUTPUT:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_CC1S_MASK) |
-			                     TIM_CCMR1_CC1S_OUT;
-			break;
-		case INPUT_MAPPED_TI1:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_CC1S_MASK) |
-			                     TIM_CCMR1_CC1S_IN_TI1;
-			break;
-		case INPUT_MAPPED_TI2:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_CC1S_MASK) |
-			                     TIM_CCMR1_CC1S_IN_TI2;
-			break;
-		case INPUT_MAPPED_TRC:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_CC1S_MASK) |
-			                     TIM_CCMR1_CC1S_IN_TRC;
-			break;
-	}
-
-	return OK;
-}
-//9,12
-Result TIMER_ext::set_capture_compare_2_mode(CC_Mode mode)
-{
-	bool channel_on = TIM_CCER(_timer) & TIM_CCER_CC2E;
-
-	if (channel_on) {
-		return USAGE_ERROR;
-	}
-
-	switch (mode)
-	{
-		case OUTPUT:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_CC2S_MASK) |
-								 TIM_CCMR1_CC2S_OUT;
-			break;
-		case INPUT_MAPPED_TI1:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_CC2S_MASK) |
-								 TIM_CCMR1_CC2S_IN_TI1;
-			break;
-		case INPUT_MAPPED_TI2:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_CC2S_MASK) |
-								 TIM_CCMR1_CC2S_IN_TI2;
-			break;
-		case INPUT_MAPPED_TRC:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_CC2S_MASK) |
-								 TIM_CCMR1_CC2S_IN_TRC;
-			break;
-	}
-
-	return OK;
-}
-//9,12
-Result TIMER_ext::set_input_capture_1_prescaler(Prescaler prescaler)
-{
-	bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC1S_MASK;
-
-	if (!channel_is_input) {
-		return USAGE_ERROR;
-	}
-
-	switch (prescaler)
-	{
-		case NO_PRESCALER:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1PSC_MASK) |
-			                     TIM_CCMR1_IC1PSC_OFF;
-			break;
-		case CAPTURE_EVERY_2_EVENTS:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1PSC_MASK) |
-			                     TIM_CCMR1_IC1PSC_2;
-			break;
-		case CAPTURE_EVERY_4_EVENTS:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1PSC_MASK) |
-			                     TIM_CCMR1_IC1PSC_4;
-			break;
-		case CAPTURE_EVERY_8_EVENTS:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1PSC_MASK) |
-			                     TIM_CCMR1_IC1PSC_8;
-			break;
-	}
-
-	return OK;
-}
-//9,12
-Result TIMER_ext::set_input_capture_2_prescaler(Prescaler prescaler)
-{
-	bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC2S_MASK;
-
-	if (!channel_is_input) {
-		return USAGE_ERROR;
-	}
-
-	switch (prescaler)
-	{
-		case NO_PRESCALER:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2PSC_MASK) |
-								 TIM_CCMR1_IC2PSC_OFF;
-			break;
-		case CAPTURE_EVERY_2_EVENTS:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2PSC_MASK) |
-								 TIM_CCMR1_IC2PSC_2;
-			break;
-		case CAPTURE_EVERY_4_EVENTS:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2PSC_MASK) |
-								 TIM_CCMR1_IC2PSC_4;
-			break;
-		case CAPTURE_EVERY_8_EVENTS:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2PSC_MASK) |
-								 TIM_CCMR1_IC2PSC_8;
-			break;
-	}
-
-	return OK;
-}
-//9,12
-Result TIMER_ext::set_input_capture_1_filter(Filter filter)
-{
-	bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC1S_MASK;
-
-	if (!channel_is_input) {
-		return USAGE_ERROR;
-	}
-
-	switch (filter)
-	{
-		case NO_FILTER:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-			TIM_CCMR1_IC1F_OFF;
-			break;
-		case CK_INT_N_2:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-			TIM_CCMR1_IC1F_CK_INT_N_2;
-			break;
-		case CK_INT_N_4:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-			TIM_CCMR1_IC1F_CK_INT_N_4;
-			break;
-		case CK_INT_N_8:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-			TIM_CCMR1_IC1F_CK_INT_N_8;
-			break;
-		case DTF_DIV_2_N_6:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-			TIM_CCMR1_IC1F_DTF_DIV_2_N_6;
-			break;
-		case DTF_DIV_2_N_8:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-			TIM_CCMR1_IC1F_DTF_DIV_2_N_8;
-			break;
-		case TF_DIV_4_N_6:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-			TIM_CCMR1_IC1F_DTF_DIV_4_N_6;
-			break;
-		case DTF_DIV_4_N_8:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-			TIM_CCMR1_IC1F_DTF_DIV_4_N_8;
-			break;
-		case DTF_DIV_8_N_6:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-			TIM_CCMR1_IC1F_DTF_DIV_8_N_6;
-			break;
-		case DTF_DIV_8_N_8:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-			TIM_CCMR1_IC1F_DTF_DIV_8_N_8;
-			break;
-		case DTF_DIV_16_N_5:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-			TIM_CCMR1_IC1F_DTF_DIV_16_N_5;
-			break;
-		case DTF_DIV_16_N_6:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-			TIM_CCMR1_IC1F_DTF_DIV_16_N_6;
-			break;
-		case DTF_DIV_16_N_8:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-			TIM_CCMR1_IC1F_DTF_DIV_16_N_8;
-			break;
-		case DTF_DIV_32_N_5:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-			TIM_CCMR1_IC1F_DTF_DIV_32_N_5;
-			break;
-		case DTF_DIV_32_N_6:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-			TIM_CCMR1_IC1F_DTF_DIV_32_N_6;
-			break;
-		case DTF_DIV_32_N_8:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-			TIM_CCMR1_IC1F_DTF_DIV_32_N_8;
-			break;
-	}
-
-	return OK;
-}
-//9,12
-Result TIMER_ext::set_input_capture_2_filter(Filter filter)
-{
-	bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC2S_MASK;
-
-	if (!channel_is_input) {
-		return USAGE_ERROR;
-	}
-
-	switch (filter)
-	{
-		case NO_FILTER:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-			TIM_CCMR1_IC2F_OFF;
-			break;
-		case CK_INT_N_2:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-			TIM_CCMR1_IC2F_CK_INT_N_2;
-			break;
-		case CK_INT_N_4:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-			TIM_CCMR1_IC2F_CK_INT_N_4;
-			break;
-		case CK_INT_N_8:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-			TIM_CCMR1_IC2F_CK_INT_N_8;
-			break;
-		case DTF_DIV_2_N_6:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-			TIM_CCMR1_IC2F_DTF_DIV_2_N_6;
-			break;
-		case DTF_DIV_2_N_8:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-			TIM_CCMR1_IC2F_DTF_DIV_2_N_8;
-			break;
-		case TF_DIV_4_N_6:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-			TIM_CCMR1_IC2F_DTF_DIV_4_N_6;
-			break;
-		case DTF_DIV_4_N_8:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-			TIM_CCMR1_IC2F_DTF_DIV_4_N_8;
-			break;
-		case DTF_DIV_8_N_6:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-			TIM_CCMR1_IC2F_DTF_DIV_8_N_6;
-			break;
-		case DTF_DIV_8_N_8:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-			TIM_CCMR1_IC2F_DTF_DIV_8_N_8;
-			break;
-		case DTF_DIV_16_N_5:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-			TIM_CCMR1_IC2F_DTF_DIV_16_N_5;
-			break;
-		case DTF_DIV_16_N_6:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-			TIM_CCMR1_IC2F_DTF_DIV_16_N_6;
-			break;
-		case DTF_DIV_16_N_8:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-			TIM_CCMR1_IC2F_DTF_DIV_16_N_8;
-			break;
-		case DTF_DIV_32_N_5:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-			TIM_CCMR1_IC2F_DTF_DIV_32_N_5;
-			break;
-		case DTF_DIV_32_N_6:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-			TIM_CCMR1_IC2F_DTF_DIV_32_N_6;
-			break;
-		case DTF_DIV_32_N_8:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-			TIM_CCMR1_IC2F_DTF_DIV_32_N_8;
-			break;
-	}
-
-	return OK;
-}
-//9,12
-Result TIMER_ext::enable_fast_output_compare_1()
-{
-	bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC1S_MASK;
-
-	if (channel_is_input) {
-		return USAGE_ERROR;
-	}
-
-	TIM_CCMR1(_timer) |= TIM_CCMR1_OC1FE;
-	return OK;
-}
-//9,12
-Result TIMER_ext::disable_fast_output_compare_1()
-{
-	bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC1S_MASK;
-
-	if (channel_is_input) {
-		return USAGE_ERROR;
-	}
-
-	TIM_CCMR1(_timer) &= ~TIM_CCMR1_OC1FE;
-	return OK;
-}
-//9,12
-Result TIMER_ext::enable_fast_output_compare_2()
-{
-	bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC2S_MASK;
-
-	if (channel_is_input) {
-		return USAGE_ERROR;
-	}
-
-	TIM_CCMR1(_timer) |= TIM_CCMR1_OC2FE;
-	return OK;
-}
-//9,12
-Result TIMER_ext::disable_fast_output_compare_2()
-{
-	bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC2S_MASK;
-
-	if (channel_is_input) {
-		return USAGE_ERROR;
-	}
-
-	TIM_CCMR1(_timer) &= ~TIM_CCMR1_OC2FE;
-	return OK;
-}
-//9,12
-Result TIMER_ext::enable_output_compare_1_preload()
-{
-	bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC1S_MASK;
-
-	if (channel_is_input) {
-		return USAGE_ERROR;
-	}
-
-	TIM_CCMR1(_timer) |= TIM_CCMR1_OC1PE;
-	return OK;
-}
-//9,12
-Result TIMER_ext::disable_output_compare_1_preload()
-{
-	bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC1S_MASK;
-
-	if (channel_is_input) {
-		return USAGE_ERROR;
-	}
-
-	TIM_CCMR1(_timer) &= ~TIM_CCMR1_OC1PE;
-	return OK;
-}
-//9,12
-Result TIMER_ext::enable_output_compare_2_preload()
-{
-	bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC2S_MASK;
-
-	if (channel_is_input) {
-		return USAGE_ERROR;
-	}
-
-	TIM_CCMR1(_timer) |= TIM_CCMR1_OC2PE;
-	return OK;
-}
-//9,12
-Result TIMER_ext::disable_output_compare_2_preload()
-{
-	bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC2S_MASK;
-
-	if (channel_is_input) {
-		return USAGE_ERROR;
-	}
-
-	TIM_CCMR1(_timer) &= ~TIM_CCMR1_OC2PE;
-	return OK;
-}
-//9,12
-Result TIMER_ext::set_output_compare_1_mode(OC_Mode mode)
-{
-	bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC1S_MASK;
-
-	if (channel_is_input) {
-		return USAGE_ERROR;
-	}
-
-	switch (mode)
-	{
-		case FROZEN:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC1M_MASK) |
-			TIM_CCMR1_OC1M_FROZEN;
-			break;
-		case ACTIVE_LEVEL_ON_MATCH:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC1M_MASK) |
-			TIM_CCMR1_OC1M_ACTIVE;
-			break;
-		case INACTIVE_LEVEL_ON_MATCH:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC1M_MASK) |
-			TIM_CCMR1_OC1M_INACTIVE;
-			break;
-		case TOGGLE:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC1M_MASK) |
-			TIM_CCMR1_OC1M_TOGGLE;
-			break;
-		case FORCE_INACTIVE_LEVEL:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC1M_MASK) |
-			TIM_CCMR1_OC1M_FORCE_LOW;
-			break;
-		case FORCE_ACTIVE_LEVEL:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC1M_MASK) |
-			TIM_CCMR1_OC1M_FORCE_HIGH;
-			break;
-		case PWM_MODE_1:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC1M_MASK) |
-			TIM_CCMR1_OC1M_PWM1;
-			break;
-		case PWM_MODE_2:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC1M_MASK) |
-			TIM_CCMR1_OC1M_PWM2;
-			break;
-	}
-
-	return OK;
-}
-//9,12
-Result TIMER_ext::set_output_compare_2_mode(OC_Mode mode)
-{
-	bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC2S_MASK;
-
-	if (channel_is_input) {
-		return USAGE_ERROR;
-	}
-
-	switch (mode)
-	{
-		case FROZEN:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC2M_MASK) |
-			TIM_CCMR1_OC2M_FROZEN;
-			break;
-		case ACTIVE_LEVEL_ON_MATCH:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC2M_MASK) |
-			TIM_CCMR1_OC2M_ACTIVE;
-			break;
-		case INACTIVE_LEVEL_ON_MATCH:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC2M_MASK) |
-			TIM_CCMR1_OC2M_INACTIVE;
-			break;
-		case TOGGLE:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC2M_MASK) |
-			TIM_CCMR1_OC2M_TOGGLE;
-			break;
-		case FORCE_INACTIVE_LEVEL:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC2M_MASK) |
-			TIM_CCMR1_OC2M_FORCE_LOW;
-			break;
-		case FORCE_ACTIVE_LEVEL:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC2M_MASK) |
-			TIM_CCMR1_OC2M_FORCE_HIGH;
-			break;
-		case PWM_MODE_1:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC2M_MASK) |
-			TIM_CCMR1_OC2M_PWM1;
-			break;
-		case PWM_MODE_2:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC2M_MASK) |
-			TIM_CCMR1_OC2M_PWM2;
-			break;
-	}
-
-	return OK;
-}
-//9,12
-Result TIMER_ext::set_capture_compare_3_mode(CC_Mode mode)
-{
-	bool channel_on = TIM_CCER(_timer) & TIM_CCER_CC3E;
-
-	if (channel_on) {
-		return USAGE_ERROR;
-	}
-
-	switch (mode)
-	{
-		case OUTPUT:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_CC3S_MASK) |
-			                     TIM_CCMR2_CC3S_OUT;
-			break;
-		case INPUT_MAPPED_TI3:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_CC3S_MASK) |
-			                     TIM_CCMR2_CC3S_IN_TI3;
-			break;
-		case INPUT_MAPPED_TI4:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_CC3S_MASK) |
-			                     TIM_CCMR2_CC3S_IN_TI4;
-			break;
-		case INPUT_MAPPED_TRC:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_CC3S_MASK) |
-			                     TIM_CCMR2_CC3S_IN_TRC;
-			break;
-	}
-
-	return OK;
-}
-//9,12
-Result TIMER_ext::set_capture_compare_4_mode(CC_Mode mode)
-{
-	bool channel_on = TIM_CCER(_timer) & TIM_CCER_CC4E;
-
-	if (channel_on) {
-		return USAGE_ERROR;
-	}
-
-	switch (mode)
-	{
-		case OUTPUT:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_CC4S_MASK) |
-								 TIM_CCMR2_CC4S_OUT;
-			break;
-		case INPUT_MAPPED_TI3:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_CC4S_MASK) |
-								 TIM_CCMR2_CC4S_IN_TI3;
-			break;
-		case INPUT_MAPPED_TI4:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_CC4S_MASK) |
-								 TIM_CCMR2_CC4S_IN_TI4;
-			break;
-		case INPUT_MAPPED_TRC:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_CC4S_MASK) |
-								 TIM_CCMR2_CC4S_IN_TRC;
-			break;
-	}
-
-	return OK;
-}
-//9,12
-Result TIMER_ext::set_input_capture_3_prescaler(Prescaler prescaler)
-{
-	bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC3S_MASK;
-
-	if (!channel_is_input) {
-		return USAGE_ERROR;
-	}
-
-	switch (prescaler)
-	{
-		case NO_PRESCALER:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_IC3PSC_MASK) |
-			                     TIM_CCMR2_IC3PSC_OFF;
-			break;
-		case CAPTURE_EVERY_2_EVENTS:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_IC3PSC_MASK) |
-			                     TIM_CCMR2_IC3PSC_2;
-			break;
-		case CAPTURE_EVERY_4_EVENTS:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_IC3PSC_MASK) |
-			                     TIM_CCMR2_IC3PSC_4;
-			break;
-		case CAPTURE_EVERY_8_EVENTS:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_IC3PSC_MASK) |
-			                     TIM_CCMR2_IC3PSC_8;
-			break;
-	}
-
-	return OK;
-}
-//9,12
-Result TIMER_ext::set_input_capture_4_prescaler(Prescaler prescaler)
-{
-	bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC4S_MASK;
-
-	if (!channel_is_input) {
-		return USAGE_ERROR;
-	}
-
-	switch (prescaler)
-	{
-		case NO_PRESCALER:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_IC4PSC_MASK) |
-								 TIM_CCMR2_IC4PSC_OFF;
-			break;
-		case CAPTURE_EVERY_2_EVENTS:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_IC4PSC_MASK) |
-								 TIM_CCMR2_IC4PSC_2;
-			break;
-		case CAPTURE_EVERY_4_EVENTS:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_IC4PSC_MASK) |
-								 TIM_CCMR2_IC4PSC_4;
-			break;
-		case CAPTURE_EVERY_8_EVENTS:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_IC4PSC_MASK) |
-								 TIM_CCMR2_IC4PSC_8;
-			break;
-	}
-
-	return OK;
-}
-//9,12
-Result TIMER_ext::set_input_capture_3_filter(Filter filter)
-{
-	bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC3S_MASK;
-
-	if (!channel_is_input) {
-		return USAGE_ERROR;
-	}
-
-	switch (filter)
-	{
-		case NO_FILTER:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-			TIM_CCMR2_IC3F_OFF;
-			break;
-		case CK_INT_N_2:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-			TIM_CCMR2_IC3F_CK_INT_N_2;
-			break;
-		case CK_INT_N_4:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-			TIM_CCMR2_IC3F_CK_INT_N_4;
-			break;
-		case CK_INT_N_8:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-			TIM_CCMR2_IC3F_CK_INT_N_8;
-			break;
-		case DTF_DIV_2_N_6:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-			TIM_CCMR2_IC3F_DTF_DIV_2_N_6;
-			break;
-		case DTF_DIV_2_N_8:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-			TIM_CCMR2_IC3F_DTF_DIV_2_N_8;
-			break;
-		case TF_DIV_4_N_6:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-			TIM_CCMR2_IC3F_DTF_DIV_4_N_6;
-			break;
-		case DTF_DIV_4_N_8:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-			TIM_CCMR2_IC3F_DTF_DIV_4_N_8;
-			break;
-		case DTF_DIV_8_N_6:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-			TIM_CCMR2_IC3F_DTF_DIV_8_N_6;
-			break;
-		case DTF_DIV_8_N_8:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-			TIM_CCMR2_IC3F_DTF_DIV_8_N_8;
-			break;
-		case DTF_DIV_16_N_5:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-			TIM_CCMR2_IC3F_DTF_DIV_16_N_5;
-			break;
-		case DTF_DIV_16_N_6:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-			TIM_CCMR2_IC3F_DTF_DIV_16_N_6;
-			break;
-		case DTF_DIV_16_N_8:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-			TIM_CCMR2_IC3F_DTF_DIV_16_N_8;
-			break;
-		case DTF_DIV_32_N_5:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-			TIM_CCMR2_IC3F_DTF_DIV_32_N_5;
-			break;
-		case DTF_DIV_32_N_6:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-			TIM_CCMR2_IC3F_DTF_DIV_32_N_6;
-			break;
-		case DTF_DIV_32_N_8:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-			TIM_CCMR2_IC3F_DTF_DIV_32_N_8;
-			break;
-	}
-
-	return OK;
-}
-//9,12
-Result TIMER_ext::set_input_capture_4_filter(Filter filter)
-{
-	bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC4S_MASK;
-
-	if (!channel_is_input) {
-		return USAGE_ERROR;
-	}
-
-	switch (filter)
-	{
-		case NO_FILTER:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-			TIM_CCMR2_IC4F_OFF;
-			break;
-		case CK_INT_N_2:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-			TIM_CCMR2_IC4F_CK_INT_N_2;
-			break;
-		case CK_INT_N_4:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-			TIM_CCMR2_IC4F_CK_INT_N_4;
-			break;
-		case CK_INT_N_8:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-			TIM_CCMR2_IC4F_CK_INT_N_8;
-			break;
-		case DTF_DIV_2_N_6:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-			TIM_CCMR2_IC4F_DTF_DIV_2_N_6;
-			break;
-		case DTF_DIV_2_N_8:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-			TIM_CCMR2_IC4F_DTF_DIV_2_N_8;
-			break;
-		case TF_DIV_4_N_6:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-			TIM_CCMR2_IC4F_DTF_DIV_4_N_6;
-			break;
-		case DTF_DIV_4_N_8:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-			TIM_CCMR2_IC4F_DTF_DIV_4_N_8;
-			break;
-		case DTF_DIV_8_N_6:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-			TIM_CCMR2_IC4F_DTF_DIV_8_N_6;
-			break;
-		case DTF_DIV_8_N_8:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-			TIM_CCMR2_IC4F_DTF_DIV_8_N_8;
-			break;
-		case DTF_DIV_16_N_5:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-			TIM_CCMR2_IC4F_DTF_DIV_16_N_5;
-			break;
-		case DTF_DIV_16_N_6:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-			TIM_CCMR2_IC4F_DTF_DIV_16_N_6;
-			break;
-		case DTF_DIV_16_N_8:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-			TIM_CCMR2_IC4F_DTF_DIV_16_N_8;
-			break;
-		case DTF_DIV_32_N_5:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-			TIM_CCMR2_IC4F_DTF_DIV_32_N_5;
-			break;
-		case DTF_DIV_32_N_6:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-			TIM_CCMR2_IC4F_DTF_DIV_32_N_6;
-			break;
-		case DTF_DIV_32_N_8:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-			TIM_CCMR2_IC4F_DTF_DIV_32_N_8;
-			break;
-	}
-
-	return OK;
-}
-//9,12
-Result TIMER_ext::enable_fast_output_compare_3()
-{
-	bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC3S_MASK;
-
-	if (channel_is_input) {
-		return USAGE_ERROR;
-	}
-
-	TIM_CCMR2(_timer) |= TIM_CCMR2_OC3FE;
-	return OK;
-}
-//9,12
-Result TIMER_ext::disable_fast_output_compare_3()
-{
-	bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC3S_MASK;
-
-	if (channel_is_input) {
-		return USAGE_ERROR;
-	}
-
-	TIM_CCMR2(_timer) &= ~TIM_CCMR2_OC3FE;
-	return OK;
-}
-//9,12
-Result TIMER_ext::enable_fast_output_compare_4()
-{
-	bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC4S_MASK;
-
-	if (channel_is_input) {
-		return USAGE_ERROR;
-	}
-
-	TIM_CCMR2(_timer) |= TIM_CCMR2_OC4FE;
-	return OK;
-}
-//9,12
-Result TIMER_ext::disable_fast_output_compare_4()
-{
-	bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC4S_MASK;
-
-	if (channel_is_input) {
-		return USAGE_ERROR;
-	}
-
-	TIM_CCMR2(_timer) &= ~TIM_CCMR2_OC4FE;
-	return OK;
-}
-//9,12
-Result TIMER_ext::enable_output_compare_3_preload()
-{
-	bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC3S_MASK;
-
-	if (channel_is_input) {
-		return USAGE_ERROR;
-	}
-
-	TIM_CCMR2(_timer) |= TIM_CCMR2_OC3PE;
-	return OK;
-}
-//9,12
-Result TIMER_ext::disable_output_compare_3_preload()
-{
-	bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC3S_MASK;
-
-	if (channel_is_input) {
-		return USAGE_ERROR;
-	}
-
-	TIM_CCMR2(_timer) &= ~TIM_CCMR2_OC3PE;
-	return OK;
-}
-//9,12
-Result TIMER_ext::enable_output_compare_4_preload()
-{
-	bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC4S_MASK;
-
-	if (channel_is_input) {
-		return USAGE_ERROR;
-	}
-
-	TIM_CCMR2(_timer) |= TIM_CCMR2_OC4PE;
-	return OK;
-}
-//9,12
-Result TIMER_ext::disable_output_compare_4_preload()
-{
-	bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC4S_MASK;
-
-	if (channel_is_input) {
-		return USAGE_ERROR;
-	}
-
-	TIM_CCMR2(_timer) &= ~TIM_CCMR2_OC4PE;
-	return OK;
-}
-//9,12
-Result TIMER_ext::set_output_compare_3_mode(OC_Mode mode)
-{
-	bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC3S_MASK;
-
-	if (channel_is_input) {
-		return USAGE_ERROR;
-	}
-
-	switch (mode)
-	{
-		case FROZEN:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC3M_MASK) |
-			TIM_CCMR2_OC3M_FROZEN;
-			break;
-		case ACTIVE_LEVEL_ON_MATCH:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC3M_MASK) |
-			TIM_CCMR2_OC3M_ACTIVE;
-			break;
-		case INACTIVE_LEVEL_ON_MATCH:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC3M_MASK) |
-			TIM_CCMR2_OC3M_INACTIVE;
-			break;
-		case TOGGLE:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC3M_MASK) |
-			TIM_CCMR2_OC3M_TOGGLE;
-			break;
-		case FORCE_INACTIVE_LEVEL:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC3M_MASK) |
-			TIM_CCMR2_OC3M_FORCE_LOW;
-			break;
-		case FORCE_ACTIVE_LEVEL:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC3M_MASK) |
-			TIM_CCMR2_OC3M_FORCE_HIGH;
-			break;
-		case PWM_MODE_1:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC3M_MASK) |
-			TIM_CCMR2_OC3M_PWM1;
-			break;
-		case PWM_MODE_2:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC3M_MASK) |
-			TIM_CCMR2_OC3M_PWM2;
-			break;
-	}
-
-	return OK;
-}
-//9,12
-Result TIMER_ext::set_output_compare_4_mode(OC_Mode mode)
-{
-	bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC4S_MASK;
-
-	if (channel_is_input) {
-		return USAGE_ERROR;
-	}
-
-	switch (mode)
-	{
-		case FROZEN:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC4M_MASK) |
-			TIM_CCMR2_OC4M_FROZEN;
-			break;
-		case ACTIVE_LEVEL_ON_MATCH:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC4M_MASK) |
-			TIM_CCMR2_OC4M_ACTIVE;
-			break;
-		case INACTIVE_LEVEL_ON_MATCH:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC4M_MASK) |
-			TIM_CCMR2_OC4M_INACTIVE;
-			break;
-		case TOGGLE:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC4M_MASK) |
-			TIM_CCMR2_OC4M_TOGGLE;
-			break;
-		case FORCE_INACTIVE_LEVEL:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC4M_MASK) |
-			TIM_CCMR2_OC4M_FORCE_LOW;
-			break;
-		case FORCE_ACTIVE_LEVEL:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC4M_MASK) |
-			TIM_CCMR2_OC4M_FORCE_HIGH;
-			break;
-		case PWM_MODE_1:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC4M_MASK) |
-			TIM_CCMR2_OC4M_PWM1;
-			break;
-		case PWM_MODE_2:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC4M_MASK) |
-			TIM_CCMR2_OC4M_PWM2;
-			break;
-	}
-
-	return OK;
-}
-//9,12
-Result TIMER_ext::enable_capture_compare_1()
-{
-	TIM_CCER(_timer) |= TIM_CCER_CC1E;
-	return OK;
-}
-//9,12
-Result TIMER_ext::disable_capture_compare_1()
-{
-	TIM_CCER(_timer) &= ~TIM_CCER_CC1E;
-	return OK;
-}
-//9,12
-Result TIMER_ext::set_capture_compare_1_polarity(Polarity polarity)
-{
-	switch (polarity)
-	{
-		case LO_FALLING_EDGE:
-			TIM_CCER(_timer) |= TIM_CCER_CC1P;
-			break;
-		case HI_RISING_EDGE:
-			TIM_CCER(_timer) &= ~TIM_CCER_CC1P;
-			break;
-	}
-
-	return OK;
-}
-Result TIMER_ext::set_capture_compare_1_com_polarity(Polarity polarity)
-{
-	switch (polarity)
-	{
-		case LO_FALLING_EDGE:
-			TIM_CCER(_timer) |= TIM_CCER_CC1NP;
-			break;
-		case HI_RISING_EDGE:
-			TIM_CCER(_timer) &= ~TIM_CCER_CC1NP;
-			break;
-	}
-
-	return OK;
-}
-//9,12
-Result TIMER_ext::enable_capture_compare_2()
-{
-	TIM_CCER(_timer) |= TIM_CCER_CC2E;
-	return OK;
-}
-//9,12
-Result TIMER_ext::disable_capture_compare_2()
-{
-	TIM_CCER(_timer) &= ~TIM_CCER_CC2E;
-	return OK;
-}
-//9,12
-Result TIMER_ext::set_capture_compare_2_polarity(Polarity polarity)
-{
-	switch (polarity)
-	{
-		case LO_FALLING_EDGE:
-			TIM_CCER(_timer) |= TIM_CCER_CC2P;
-			break;
-		case HI_RISING_EDGE:
-			TIM_CCER(_timer) &= ~TIM_CCER_CC2P;
-			break;
-	}
-
-	return OK;
-}
-Result TIMER_ext::enable_capture_compare_3()
-{
-	TIM_CCER(_timer) |= TIM_CCER_CC3E;
-	return OK;
-}
-//9,12
-Result TIMER_ext::disable_capture_compare_3()
-{
-	TIM_CCER(_timer) &= ~TIM_CCER_CC3E;
-	return OK;
-}
-//9,12
-Result TIMER_ext::set_capture_compare_3_polarity(Polarity polarity)
-{
-	switch (polarity)
-	{
-		case LO_FALLING_EDGE:
-			TIM_CCER(_timer) |= TIM_CCER_CC3P;
-			break;
-		case HI_RISING_EDGE:
-			TIM_CCER(_timer) &= ~TIM_CCER_CC3P;
-			break;
-	}
-
-	return OK;
-}
-Result TIMER_ext::set_capture_compare_3_com_polarity(Polarity polarity)
-{
-	switch (polarity)
-	{
-		case LO_FALLING_EDGE:
-			TIM_CCER(_timer) |= TIM_CCER_CC3NP;
-			break;
-		case HI_RISING_EDGE:
-			TIM_CCER(_timer) &= ~TIM_CCER_CC3NP;
-			break;
-	}
-
-	return OK;
-}
-//9,12
-Result TIMER_ext::enable_capture_compare_4()
-{
-	TIM_CCER(_timer) |= TIM_CCER_CC4E;
-	return OK;
-}
-//9,12
-Result TIMER_ext::disable_capture_compare_4()
-{
-	TIM_CCER(_timer) &= ~TIM_CCER_CC4E;
-	return OK;
-}
-//9,12
-Result TIMER_ext::set_capture_compare_4_polarity(Polarity polarity)
-{
-	switch (polarity)
-	{
-		case LO_FALLING_EDGE:
-			TIM_CCER(_timer) |= TIM_CCER_CC4P;
-			break;
-		case HI_RISING_EDGE:
-			TIM_CCER(_timer) &= ~TIM_CCER_CC4P;
-			break;
-	}
-
-	return OK;
-}
-Result TIMER_ext::set_capture_compare_4_com_polarity(Polarity polarity)
-{
-	switch (polarity)
-	{
-		case LO_FALLING_EDGE:
-			TIM_CCER(_timer) |= (1<<15);
-			break;
-		case HI_RISING_EDGE:
-			TIM_CCER(_timer) &= ~(1<<15);
-			break;
-	}
-
-	return OK;
-}
-//9,12
-uint16_t TIMER_ext::get_counter_value()
-{
-	return TIM_CNT(_timer);
-}
-//9,12
-void TIMER_ext::set_counter_value(uint16_t value)
-{
-	TIM_CNT(_timer) = value;
-}
-//9,12
-uint16_t TIMER_ext::get_prescaler_value()
-{
-	return TIM_PSC(_timer);
-}
-//9,12
-void TIMER_ext::set_prescaler_value(uint32_t value)
-{
-	TIM_PSC(_timer) = value;
-}
-//9,12
-uint16_t TIMER_ext::get_autoreload_value()
-{
-	return TIM_ARR(_timer);
-}
-//9,12
-void TIMER_ext::set_autoreload_value(uint32_t value)
-{
-	TIM_ARR(_timer) = value;
-}
-//9,12
-uint16_t TIMER_ext::get_capture_compare_1_value()
-{
-	return TIM_CCR1(_timer);
-}
-//9,12
-void TIMER_ext::set_capture_compare_1_value(uint32_t value)
-{
-	TIM_CCR1(_timer) = value;
-}
-//9,12
-uint16_t TIMER_ext::get_capture_compare_2_value()
-{
-	return TIM_CCR2(_timer);
-}
-//9,12
-void TIMER_ext::set_capture_compare_2_value(uint32_t value)
-{
-	TIM_CCR2(_timer) = value;
-}
-
-uint16_t TIMER_ext::get_capture_compare_3_value()
-{
-	return TIM_CCR3(_timer);
-}
-//9,12
-void TIMER_ext::set_capture_compare_3_value(uint32_t value)
-{
-	TIM_CCR3(_timer) = value;
-}
-//9,12
-uint16_t TIMER_ext::get_capture_compare_4_value()
-{
-	return TIM_CCR4(_timer);
-}
-//9,12
-void TIMER_ext::set_capture_compare_4_value(uint32_t value)
-{
-	TIM_CCR4(_timer) = value;
-}
-
-void TIMER_ext::enable_ctrl_pwm_outputs()
-{
-	TIM_BDTR(_timer) |= TIM_BDTR_MOE;
-}
-
-void TIMER_ext::disable_ctrl_pwm_outputs()
-{
-	TIM_BDTR(_timer) &= ~TIM_BDTR_MOE;
-}
\ No newline at end of file
diff --git a/timer_ext.h b/timer_ext.h
deleted file mode 100644
index c63300d..0000000
--- a/timer_ext.h
+++ /dev/null
@@ -1,342 +0,0 @@
-/*
- * This file is part of the libopencm3_cpp_extensions project.
- * hosted at http://github.com/thirdpin/libopencm3_cpp_extensions
- *
- * Copyright (C) 2016  Third Pin LLC
- * Written by Anastasiia Lazareva <a.lazareva@thirdpin.ru>
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-/* 
-TIM C++ Wrapper of libopencm3 library for STM32F2, STM32F4 
-*/
-
-#ifndef TIMER_EXT_H
-#define TIMER_EXT_H
-
-#include <libopencm3/stm32/timer.h>
-#include <libopencm3/stm32/rcc.h>
-
-namespace TIMER_CPP_Extension
-{
-	typedef enum {
-		OK,
-		USAGE_ERROR,
-		NOT_SUPPORTED
-	} Result;
-
-	typedef enum {
-		COUNTER_OVERFLOW_AND_UG,
-		COUNTER_OVERFLOW,
-	} UEV_Source;
-
-	typedef enum {
-		ONE_SHOT,
-		CONTINUOUS
-	} CounterMode;
-
-	typedef enum {
-		UP,
-		DOWN
-	} CounterDirection;
-
-	typedef enum {
-		EDGE,
-		CENTER_DOWN,
-		CENTER_UP,
-		CENTER_UP_DOWN
-	} Alignment;
-
-	typedef enum {
-		TIMER_CLOCK_MUL_1,
-		TIMER_CLOCK_MUL_2,
-		TIMER_CLOCK_MUL_4
-	} ClockDivision;
-
-	typedef enum {
-		MASTER_RESET,
-		ENABLE,
-		UPDATE,
-		COMPARE_PULSE,
-		COMPARE_OC1REF,
-		COMPARE_OC2REF
-	} MasterMode;
-
-	typedef enum {
-		DISABLED,
-		SLAVE_RESET,
-		GATED,
-		TRIGGER,
-		EXTERNAL_CLOCK
-	} SlaveMode;
-
-	typedef enum {
-		INTERNAL_TRIGGER_0,
-		INTERNAL_TRIGGER_1,
-		INTERNAL_TRIGGER_2,
-		INTERNAL_TRIGGER_3,
-		EDGE_DETECTOR,
-		FILTERED_TIMER_INPUT_1,
-		FILTERED_TIMER_INPUT_2
-	} Trigger;
-
-	typedef enum {
-		UPDATE_INTERRUPT,
-		CAPTURE_COMPARE_1_INTERRUPT,
-		CAPTURE_COMPARE_2_INTERRUPT,
-		CAPTURE_COMPARE_3_INTERRUPT,
-		CAPTURE_COMPARE_4_INTERRUPT,
-		TRIGGER_INTERRUPT,
-		CAPTURE_COMPARE_1_OVERCAPTURE,
-		CAPTURE_COMPARE_2_OVERCAPTURE,
-		CAPTURE_COMPARE_3_OVERCAPTURE,
-		CAPTURE_COMPARE_4_OVERCAPTURE
-	} Flag;
-
-	typedef enum {
-		OUTPUT,
-		INPUT_MAPPED_TI1,
-		INPUT_MAPPED_TI2,
-		INPUT_MAPPED_TI3,
-		INPUT_MAPPED_TI4,
-		INPUT_MAPPED_TRC
-	} CC_Mode;
-
-	typedef enum {
-		NO_PRESCALER,
-		CAPTURE_EVERY_2_EVENTS,
-		CAPTURE_EVERY_4_EVENTS,
-		CAPTURE_EVERY_8_EVENTS
-	} Prescaler;
-
-	typedef enum {
-		NO_FILTER,
-		CK_INT_N_2,
-		CK_INT_N_4,
-		CK_INT_N_8,
-		DTF_DIV_2_N_6,
-		DTF_DIV_2_N_8,
-		TF_DIV_4_N_6,
-		DTF_DIV_4_N_8,
-		DTF_DIV_8_N_6,
-		DTF_DIV_8_N_8,
-		DTF_DIV_16_N_5,
-		DTF_DIV_16_N_6,
-		DTF_DIV_16_N_8,
-		DTF_DIV_32_N_5,
-		DTF_DIV_32_N_6,
-		DTF_DIV_32_N_8,
-	} Filter;
-
-	typedef enum {
-		FROZEN,
-		ACTIVE_LEVEL_ON_MATCH,
-		INACTIVE_LEVEL_ON_MATCH,
-		TOGGLE,
-		FORCE_INACTIVE_LEVEL,
-		FORCE_ACTIVE_LEVEL,
-		PWM_MODE_1,
-		PWM_MODE_2
-	} OC_Mode;
-
-	typedef enum {
-		LO_FALLING_EDGE,
-		HI_RISING_EDGE
-	} Polarity;
-
-	class TIMER_ext
-	{
-	public:
-		TIMER_ext(uint8_t timer_num)
-		{
-#if defined(STM32F2) || defined(STM32F4)
-			switch (timer_num)
-			{
-			case 1:
-				_timer = TIM1;
-				rcc_periph_reset_pulse(RST_TIM1);
-				break;
-			case 2:
-				_timer = TIM2;
-				rcc_periph_reset_pulse(RST_TIM2);
-				break;
-			case 3:
-				_timer = TIM3;
-				rcc_periph_reset_pulse(RST_TIM3);
-				break;
-			case 4:
-				_timer = TIM4;
-				rcc_periph_reset_pulse(RST_TIM4);
-				break;
-			case 5:
-				_timer = TIM5;
-				rcc_periph_reset_pulse(RST_TIM5);
-				break;
-			case 6:
-				_timer = TIM6;
-				rcc_periph_reset_pulse(RST_TIM6);
-				break;
-			case 7:
-				_timer = TIM7;
-				rcc_periph_reset_pulse(RST_TIM7);
-				break;
-			case 8:
-				_timer = TIM8;
-				rcc_periph_reset_pulse(RST_TIM8);
-				break;
-			case 9:
-				_timer = TIM9;
-				rcc_periph_reset_pulse(RST_TIM9);
-				break;
-			case 10:
-				_timer = TIM10;
-				rcc_periph_reset_pulse(RST_TIM10);
-				break;
-			case 11:
-				_timer = TIM11;
-				rcc_periph_reset_pulse(RST_TIM11);
-				break;
-			case 12:
-				_timer = TIM12;
-				rcc_periph_reset_pulse(RST_TIM12);
-				break;
-			case 13:
-				_timer = TIM13;
-				rcc_periph_reset_pulse(RST_TIM13);
-				break;
-			case 14:
-				_timer = TIM14;
-				rcc_periph_reset_pulse(RST_TIM14);
-				break;
-			}
-#endif
-		}
-		//CR1//////////////////////////////////////////////////////
-		Result enable_counter();
-		Result disable_counter();
-		Result enable_update_event_generation();
-		Result disable_update_event_generation();
-		Result set_update_event_source(UEV_Source source);
-		Result set_counter_mode(CounterMode mode);
-		Result set_counter_direction(CounterDirection dir);
-		Result set_alignment(Alignment alignment);
-		Result enable_autoreload_preload();
-		Result disable_autoreload_preload();
-		Result set_clock_division(ClockDivision div);
-		//CR2//////////////////////////////////////////////////////
-		Result set_master_mode(MasterMode mode);
-		//SMCR/////////////////////////////////////////////////////
-		Result set_slave_mode(SlaveMode mode);
-		Result set_trigger(Trigger trigger);
-		Result enable_master_slave_mode();
-		Result disable_master_slave_mode();
-		//DIER/////////////////////////////////////////////////////
-		Result enable_update_interrupt();
-		Result disable_update_interrupt();
-		Result enable_capture_compare_1_interrupt();
-		Result disable_capture_compare_1_interrupt();
-		Result enable_capture_compare_2_interrupt();
-		Result disable_capture_compare_2_interrupt();
-		Result enable_capture_compare_3_interrupt();
-		Result disable_capture_compare_3_interrupt();
-		Result enable_capture_compare_4_interrupt();
-		Result disable_capture_compare_4_interrupt();
-		Result enable_trigger_interrupt();
-		Result disable_trigger_interrupt();
-		//SR///////////////////////////////////////////////////////
-		bool get_flag_status(Flag flag);
-		Result clear_flag_status(Flag flag);
-		//EGR//////////////////////////////////////////////////////
-		void update_generation();
-		//CCMR1////////////////////////////////////////////////////
-		Result set_capture_compare_1_mode(CC_Mode mode);
-		Result set_capture_compare_2_mode(CC_Mode mode);
-		Result set_input_capture_1_prescaler(Prescaler prescaler);
-		Result set_input_capture_2_prescaler(Prescaler prescaler);
-		Result set_input_capture_1_filter(Filter filter);
-		Result set_input_capture_2_filter(Filter filter);
-		Result enable_fast_output_compare_1();
-		Result disable_fast_output_compare_1();
-		Result enable_fast_output_compare_2();
-		Result disable_fast_output_compare_2();
-		Result enable_output_compare_1_preload();
-		Result disable_output_compare_1_preload();
-		Result enable_output_compare_2_preload();
-		Result disable_output_compare_2_preload();
-		Result set_output_compare_1_mode(OC_Mode mode);
-		Result set_output_compare_2_mode(OC_Mode mode);
-		//CCMR2////////////////////////////////////////////////////
-		Result set_capture_compare_3_mode(CC_Mode mode);
-		Result set_capture_compare_4_mode(CC_Mode mode);
-		Result set_input_capture_3_prescaler(Prescaler prescaler);
-		Result set_input_capture_4_prescaler(Prescaler prescaler);
-		Result set_input_capture_3_filter(Filter filter);
-		Result set_input_capture_4_filter(Filter filter);
-		Result enable_fast_output_compare_3();
-		Result disable_fast_output_compare_3();
-		Result enable_fast_output_compare_4();
-		Result disable_fast_output_compare_4();
-		Result enable_output_compare_3_preload();
-		Result disable_output_compare_3_preload();
-		Result enable_output_compare_4_preload();
-		Result disable_output_compare_4_preload();
-		Result set_output_compare_3_mode(OC_Mode mode);
-		Result set_output_compare_4_mode(OC_Mode mode);
-		//CCER/////////////////////////////////////////////////////
-		Result enable_capture_compare_1();
-		Result disable_capture_compare_1();
-		Result set_capture_compare_1_polarity(Polarity polarity);
-		Result set_capture_compare_1_com_polarity(Polarity polarity);
-		Result enable_capture_compare_2();
-		Result disable_capture_compare_2();
-		Result set_capture_compare_2_polarity(Polarity polarity);
-		Result enable_capture_compare_3();
-		Result disable_capture_compare_3();
-		Result set_capture_compare_3_polarity(Polarity polarity);
-		Result set_capture_compare_3_com_polarity(Polarity polarity);
-		Result enable_capture_compare_4();
-		Result disable_capture_compare_4();
-		Result set_capture_compare_4_polarity(Polarity polarity);
-		Result set_capture_compare_4_com_polarity(Polarity polarity);
-		//CNT//////////////////////////////////////////////////////
-		uint16_t get_counter_value();
-		void set_counter_value(uint16_t value);
-		//PSC//////////////////////////////////////////////////////
-		uint16_t get_prescaler_value();
-		void set_prescaler_value(uint32_t value);
-		//ARR//////////////////////////////////////////////////////
-		uint16_t get_autoreload_value();
-		void set_autoreload_value(uint32_t value);
-		//CCR1/////////////////////////////////////////////////////
-		uint16_t get_capture_compare_1_value();
-		void set_capture_compare_1_value(uint32_t value);
-		//CCR2/////////////////////////////////////////////////////
-		uint16_t get_capture_compare_2_value();
-		void set_capture_compare_2_value(uint32_t value);
-		//CCR3/////////////////////////////////////////////////////
-		uint16_t get_capture_compare_3_value();
-		void set_capture_compare_3_value(uint32_t value);
-		//CCR4/////////////////////////////////////////////////////
-		uint16_t get_capture_compare_4_value();
-		void set_capture_compare_4_value(uint32_t value);
-		//BDTR/////////////////////////////////////////////////////
-		void enable_ctrl_pwm_outputs();
-		void disable_ctrl_pwm_outputs();
-	private:
-		uint32_t _timer;
-	};
-}
-
-#endif