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authorxiangmingzhu <xiangzhu@cisco.com>2014-04-30 11:48:07 +0400
committerJean-Marc Valin <jmvalin@jmvalin.ca>2014-10-04 05:16:00 +0400
commitc95c9a048f3283afb2e412b10085d4f7c19e1412 (patch)
treeed8873af6559d7a98922e0fed85be47c826ef521 /celt/cpu_support.h
parent80460334b77d70e665a390503cd8992cdad06c10 (diff)
Cisco optimization for x86 & fixed point
1. Only for fixed point on x86 platform (32bit and 64bit, uses SIMD intrinsics up to SSE4.2) 2. Use "configure --enable-fixed-point --enable-intrinsics" to enable optimization, default is disabled. 3. Official test cases are verified and passed. Signed-off-by: Timothy B. Terriberry <tterribe@xiph.org>
Diffstat (limited to 'celt/cpu_support.h')
-rw-r--r--celt/cpu_support.h13
1 files changed, 12 insertions, 1 deletions
diff --git a/celt/cpu_support.h b/celt/cpu_support.h
index d68dbe62..71efff14 100644
--- a/celt/cpu_support.h
+++ b/celt/cpu_support.h
@@ -42,6 +42,18 @@
*/
#define OPUS_ARCHMASK 3
+#elif defined(OPUS_X86_MAY_HAVE_SSE2) || defined(OPUS_X86_MAY_HAVE_SSE4_1)
+
+#include "x86/x86cpu.h"
+/* We currently support 3 x86 variants:
+ * arch[0] -> non-sse
+ * arch[1] -> sse2
+ * arch[2] -> sse4.1
+ * arch[3] -> NULL
+ */
+#define OPUS_ARCHMASK 3
+int opus_select_arch(void);
+
#else
#define OPUS_ARCHMASK 0
@@ -50,5 +62,4 @@ static OPUS_INLINE int opus_select_arch(void)
return 0;
}
#endif
-
#endif