diff options
| author | Jean-Marc Valin <jmvalin@jmvalin.ca> | 2022-07-09 10:15:18 +0300 |
|---|---|---|
| committer | Jean-Marc Valin <jmvalin@jmvalin.ca> | 2022-07-09 10:15:18 +0300 |
| commit | 1504d2d4aaa8ec3a2d298a5bc226cde427f82b26 (patch) | |
| tree | a67ab972a968d3e95fa410833cd0e4e6c5c198a7 /silk | |
| parent | caf56aab41c53b129491c986844de029e619ce27 (diff) | |
Fix C90-related warningsexp_warnings1
Diffstat (limited to 'silk')
| -rw-r--r-- | silk/tests/test_unit_LPC_inv_pred_gain.c | 2 | ||||
| -rw-r--r-- | silk/x86/NSQ_del_dec_sse4_1.c | 3 | ||||
| -rw-r--r-- | silk/x86/NSQ_sse4_1.c | 2 |
3 files changed, 4 insertions, 3 deletions
diff --git a/silk/tests/test_unit_LPC_inv_pred_gain.c b/silk/tests/test_unit_LPC_inv_pred_gain.c index 67067cea..7ca902ad 100644 --- a/silk/tests/test_unit_LPC_inv_pred_gain.c +++ b/silk/tests/test_unit_LPC_inv_pred_gain.c @@ -43,6 +43,7 @@ int check_stability(opus_int16 *A_Q12, int order) { int i; int j; int sum_a, sum_abs_a; + double y[SILK_MAX_ORDER_LPC] = {0}; sum_a = sum_abs_a = 0; for( j = 0; j < order; j++ ) { sum_a += A_Q12[ j ]; @@ -57,7 +58,6 @@ int check_stability(opus_int16 *A_Q12, int order) { if( sum_abs_a < 4096 ) { return 1; } - double y[SILK_MAX_ORDER_LPC] = {0}; y[0] = 1; for( i = 0; i < 10000; i++ ) { double sum = 0; diff --git a/silk/x86/NSQ_del_dec_sse4_1.c b/silk/x86/NSQ_del_dec_sse4_1.c index 42735c52..a58a76cd 100644 --- a/silk/x86/NSQ_del_dec_sse4_1.c +++ b/silk/x86/NSQ_del_dec_sse4_1.c @@ -387,6 +387,7 @@ static OPUS_INLINE void silk_noise_shape_quantizer_del_dec_sse4_1( opus_int32 q1_Q0, q1_Q10, q2_Q10, exc_Q14, LPC_exc_Q14, xq_Q14, Gain_Q10; opus_int32 tmp1, tmp2, sLF_AR_shp_Q14; opus_int32 *pred_lag_ptr, *shp_lag_ptr, *psLPC_Q14; + int rdo_offset; VARDECL( NSQ_sample_pair, psSampleState ); NSQ_del_dec_struct *psDD; @@ -399,7 +400,7 @@ static OPUS_INLINE void silk_noise_shape_quantizer_del_dec_sse4_1( celt_assert( nStatesDelayedDecision > 0 ); ALLOC( psSampleState, nStatesDelayedDecision, NSQ_sample_pair ); - int rdo_offset = (Lambda_Q10 >> 1) - 512; + rdo_offset = (Lambda_Q10 >> 1) - 512; shp_lag_ptr = &NSQ->sLTP_shp_Q14[ NSQ->sLTP_shp_buf_idx - lag + HARM_SHAPE_FIR_TAPS / 2 ]; pred_lag_ptr = &sLTP_Q15[ NSQ->sLTP_buf_idx - lag + LTP_ORDER / 2 ]; diff --git a/silk/x86/NSQ_sse4_1.c b/silk/x86/NSQ_sse4_1.c index a2a74659..d5ae1d3b 100644 --- a/silk/x86/NSQ_sse4_1.c +++ b/silk/x86/NSQ_sse4_1.c @@ -719,10 +719,10 @@ static OPUS_INLINE void silk_nsq_scale_states_sse4_1( /* Adjust for changing gain */ if( Gains_Q16[ subfr ] != NSQ->prev_gain_Q16 ) { + __m128i xmm_gain_adj_Q16, xmm_sLTP_shp_Q14_x2x0, xmm_sLTP_shp_Q14_x3x1; gain_adj_Q16 = silk_DIV32_varQ( NSQ->prev_gain_Q16, Gains_Q16[ subfr ], 16 ); /* Scale long-term shaping state */ - __m128i xmm_gain_adj_Q16, xmm_sLTP_shp_Q14_x2x0, xmm_sLTP_shp_Q14_x3x1; /* prepare gain_adj_Q16 in packed 4 32-bits */ xmm_gain_adj_Q16 = _mm_set1_epi32(gain_adj_Q16); |