| Age | Commit message (Collapse) | Author |
|---|
|
# Conflicts:
# lib/stm32/f2/Makefile
# lib/stm32/f4/Makefile
|
|
add register grouping, fixup comment have them pickedup by doxygen, align style and masks.
|
|
Add basically what's needed to have some minimal but usefull subset of
function for a timer: irqs, compare, period, out polarity, enable/disable
and start.
|
|
lptimer peripheral is present on f4,f7,l0,l4,g0,g4 and prob others. Extract
content from stm32l0 timer.h and make it usable by other chips.
|
|
|
|
F09x and L4 share the same cselr register, as well as some L0s, factorize
definitions in a new shared header and add helpers.
fyi, that register allows to redefine dma channel peripheral mapping - see
device datasheet for mapping tables.
|
|
|
|
|
|
Fixes some missing definitions. cond/endcond is hard to get right
sometimes!
|
|
They were always landing on the top level, or not even present.
|
|
Eliminates errors, fixes groupings, adds missing groupings.
|
|
|
|
|
|
|
|
|
|
This uses the existing f4 code as a new shared common base code.
|
|
This uses the existing f4 code as a new shared common base code.
|
|
While this appears to be a backward change, this moves the _register_
definitions (their addresses) and the actually specific to f4/f7
numbering back into the explicit headers. Potentially this could be
pulled out again, but it's not much code.
This then allows the stm32l1 to use all the rest of this code, with the
differences really being just the addresses of the registers.
|
|
Never seen any reason for these noisy verbose defines. They're not
helpful, and we've never needed them for doing sequence setting code
anyway. Just drop them.
|
|
Use the masks and shifts defined. common style.
|
|
Lots of common stuff, but the F7 fixed the temperature sensor randomness
that the f4 had. Separate the definitions properly.
|
|
|
|
|
|
|
|
It's available on f0, f2, f3, f4, f7, l0, l1 and l4.
Just note that it's not available on f1.
|
|
With the addition of a define for I2C4, the existing common i2c
functions seem to work out of the box on the F7 (tested on an
STM32F750).
|
|
While on all current chips, exticr gpio port mux selection is coded on 4 bits,
stm32g0 EXTI_EXTICR register uses 8 bits. Align all exti header to reference
that value (was previously defined for f0 as SYCFG_EXTICR_SKIP)
|
|
RUN_PD bit.
flash_unlock_acr allows to unlock RUN_PD bit from FLASH_ACR register. Relock is done automatically
when writing 0 to RUN_PD, so no flash_lock_acr method.
|
|
Preparation for stm32g0 support, as this chip's exti register map evolved and is
no longer common ...
|
|
|
|
|
|
|
|
All spi v2 peripherals include the Motorola/TI Frame formatting options
introduced with F2.
|
|
Tested only on the F3 so far.
|
|
stm32l0 devices have tim21 and tim22.
|
|
|
|
# Conflicts:
# Makefile
# include/libopencm3/stm32/common/timer_common_all.h
# include/libopencm3/stm32/sdio.h
# include/libopencm3/usb/usbstd.h
# lib/stm32/f1/Makefile
# lib/stm32/f2/Makefile
# lib/stm32/f4/Makefile
# lib/usb/usb_f107.c
# lib/usb/usb_msc.c
|
|
It's always stream on the "new" dma controller (unless it's channel....)
Fix a couple of inconsistent prototypes that had carried over from f1
originally. Reported by vampi on irc.
|
|
This includes adding documentation to the status flags.
Originally tracked at: https://github.com/libopencm3/libopencm3/pull/833
Modified to drop whitespace changes, and simply boolean return.
|
|
Original discussion at: https://github.com/libopencm3/libopencm3/pull/702
|
|
I2C3 is on many parts, but wasn't properly supported with the register
definitions. Declare them centrally, just depending on the memorymap
defining them. On some parts, the rcc bits were defined, but not the
base registers.
Fixes: https://github.com/libopencm3/libopencm3/issues/820
|
|
This shows what is _actually_ different for f7. A couple of option
bits, and a renaming of bit 7 of the status register, from Program
Sequence Error to Erase Sequence Error.
We keep the separate implementation of wait_for_last_operation, to meet
the "suggestions" of the reference manual to insert a DSB instruction.
Keeping the renamed bit/functions also requires us to keep separate
implementations of the flag clearing functions
|
|
Move the last few register defines back to their relevant headers, add
doxygen and groups. While these registers _were_ "common" they were the
_only_ common things, so it's simpler for future work (merging f7 with
f2/4) to move them back separately.
|
|
This then eliminates the misguided attempts at merging f2/4 and f3 flash
support. Some headers remain.
|
|
We've got a "f" flash file for common apis now, use it.
|
|
F3's flash interface is actually quite different, don't try and force
sharing code that isn't really related. The "PGERR" is a very different
bit than the parallelism error that f2/4/7 have.
|
|
The keys differ between some familes, but the documentation and
implementation are standard.
|
|
Paves the way for using common code.
|
|
Copied a few times.
|
|
All that changes is the size of the field.
|
